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gallium/util: make sure cache line size is not zero
[mesa.git]
/
src
/
gallium
/
auxiliary
/
util
/
u_cpu_detect.c
diff --git
a/src/gallium/auxiliary/util/u_cpu_detect.c
b/src/gallium/auxiliary/util/u_cpu_detect.c
index 28197f4a9d8354cd834c9314fff7a10ece2f026e..23ab46c54bc628653f2cd960a9736c66a3611066 100644
(file)
--- a/
src/gallium/auxiliary/util/u_cpu_detect.c
+++ b/
src/gallium/auxiliary/util/u_cpu_detect.c
@@
-409,8
+409,12
@@
util_cpu_detect(void)
}
if (regs[0] >= 0x80000006) {
}
if (regs[0] >= 0x80000006) {
+ /* should we really do this if the clflush size above worked? */
+ unsigned int cacheline;
cpuid(0x80000006, regs2);
cpuid(0x80000006, regs2);
- util_cpu_caps.cacheline = regs2[2] & 0xFF;
+ cacheline = regs2[2] & 0xFF;
+ if (cacheline > 0)
+ util_cpu_caps.cacheline = cacheline;
}
if (!util_cpu_caps.has_sse) {
}
if (!util_cpu_caps.has_sse) {