- OUT_PKT0(ring, REG_A4XX_PC_PRIM_VTX_CNTL, 1);
- OUT_RING(ring, A4XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST);
-
- /* emit generic state now: */
- fd4_emit_state(ctx, ring, &emit);
- reset_viewport(ring, pfb);
-
- if (buffers & PIPE_CLEAR_DEPTH) {
- OUT_PKT0(ring, REG_A4XX_RB_DEPTH_CONTROL, 1);
- OUT_RING(ring, A4XX_RB_DEPTH_CONTROL_Z_WRITE_ENABLE |
- A4XX_RB_DEPTH_CONTROL_Z_ENABLE |
- A4XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_ALWAYS));
-
- fd_wfi(ctx, ring);
- OUT_PKT0(ring, REG_A4XX_GRAS_CL_VPORT_ZOFFSET_0, 2);
- OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZOFFSET_0(0.0));
- OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZSCALE_0(depth));
- ctx->dirty |= FD_DIRTY_VIEWPORT;
- } else {
- OUT_PKT0(ring, REG_A4XX_RB_DEPTH_CONTROL, 1);
- OUT_RING(ring, A4XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_NEVER));
- }
-
- if (buffers & PIPE_CLEAR_STENCIL) {
- OUT_PKT0(ring, REG_A4XX_RB_STENCILREFMASK, 2);
- OUT_RING(ring, A4XX_RB_STENCILREFMASK_STENCILREF(stencil) |
- A4XX_RB_STENCILREFMASK_STENCILMASK(stencil) |
- A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(0xff));
- OUT_RING(ring, A4XX_RB_STENCILREFMASK_STENCILREF(0) |
- A4XX_RB_STENCILREFMASK_STENCILMASK(0) |
- 0xff000000 | // XXX ???
- A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(0xff));
-
- OUT_PKT0(ring, REG_A4XX_RB_STENCIL_CONTROL, 2);
- OUT_RING(ring, A4XX_RB_STENCIL_CONTROL_STENCIL_ENABLE |
- A4XX_RB_STENCIL_CONTROL_FUNC(FUNC_ALWAYS) |
- A4XX_RB_STENCIL_CONTROL_FAIL(STENCIL_KEEP) |
- A4XX_RB_STENCIL_CONTROL_ZPASS(STENCIL_REPLACE) |
- A4XX_RB_STENCIL_CONTROL_ZFAIL(STENCIL_KEEP) |
- A4XX_RB_STENCIL_CONTROL_FUNC_BF(FUNC_NEVER) |
- A4XX_RB_STENCIL_CONTROL_FAIL_BF(STENCIL_KEEP) |
- A4XX_RB_STENCIL_CONTROL_ZPASS_BF(STENCIL_KEEP) |
- A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP));
- OUT_RING(ring, A4XX_RB_STENCIL_CONTROL2_STENCIL_BUFFER);
- } else {
- OUT_PKT0(ring, REG_A4XX_RB_STENCILREFMASK, 2);
- OUT_RING(ring, A4XX_RB_STENCILREFMASK_STENCILREF(0) |
- A4XX_RB_STENCILREFMASK_STENCILMASK(0) |
- A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(0));
- OUT_RING(ring, A4XX_RB_STENCILREFMASK_BF_STENCILREF(0) |
- A4XX_RB_STENCILREFMASK_BF_STENCILMASK(0) |
- A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(0));
-
- OUT_PKT0(ring, REG_A4XX_RB_STENCIL_CONTROL, 2);
- OUT_RING(ring, A4XX_RB_STENCIL_CONTROL_FUNC(FUNC_NEVER) |
- A4XX_RB_STENCIL_CONTROL_FAIL(STENCIL_KEEP) |
- A4XX_RB_STENCIL_CONTROL_ZPASS(STENCIL_KEEP) |
- A4XX_RB_STENCIL_CONTROL_ZFAIL(STENCIL_KEEP) |
- A4XX_RB_STENCIL_CONTROL_FUNC_BF(FUNC_NEVER) |
- A4XX_RB_STENCIL_CONTROL_FAIL_BF(STENCIL_KEEP) |
- A4XX_RB_STENCIL_CONTROL_ZPASS_BF(STENCIL_KEEP) |
- A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP));
- OUT_RING(ring, 0x00000000); /* RB_STENCIL_CONTROL2 */
- }