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freedreno/ir3: resync instr-a3xx.h/disasm-a3xx.c
[mesa.git]
/
src
/
gallium
/
drivers
/
freedreno
/
freedreno_gmem.h
diff --git
a/src/gallium/drivers/freedreno/freedreno_gmem.h
b/src/gallium/drivers/freedreno/freedreno_gmem.h
index c7c687419b4ad77d8288a17325684476ef342091..6598ea9cc8b6167adfce00ebdf751a4558432d60 100644
(file)
--- a/
src/gallium/drivers/freedreno/freedreno_gmem.h
+++ b/
src/gallium/drivers/freedreno/freedreno_gmem.h
@@
-31,6
+31,8
@@
#include "pipe/p_context.h"
#include "pipe/p_context.h"
+#include "freedreno_util.h"
+
/* per-pipe configuration for hw binning: */
struct fd_vsc_pipe {
struct fd_bo *bo;
/* per-pipe configuration for hw binning: */
struct fd_vsc_pipe {
struct fd_bo *bo;
@@
-47,14
+49,22
@@
struct fd_tile {
struct fd_gmem_stateobj {
struct pipe_scissor_state scissor;
struct fd_gmem_stateobj {
struct pipe_scissor_state scissor;
- uint cpp;
+ uint32_t cbuf_base[MAX_RENDER_TARGETS];
+ uint32_t zsbuf_base[2];
+ uint8_t cbuf_cpp[MAX_RENDER_TARGETS];
+ uint8_t zsbuf_cpp[2];
uint16_t bin_h, nbins_y;
uint16_t bin_w, nbins_x;
uint16_t minx, miny;
uint16_t width, height;
uint16_t bin_h, nbins_y;
uint16_t bin_w, nbins_x;
uint16_t minx, miny;
uint16_t width, height;
- bool has_zs; /* gmem config using depth/stencil? */
};
};
-void fd_gmem_render_tiles(struct pipe_context *pctx);
+struct fd_batch;
+
+void fd_gmem_render_tiles(struct fd_batch *batch);
+void fd_gmem_render_noop(struct fd_batch *batch);
+
+bool fd_gmem_needs_restore(struct fd_batch *batch, struct fd_tile *tile,
+ uint32_t buffers);
#endif /* FREEDRENO_GMEM_H_ */
#endif /* FREEDRENO_GMEM_H_ */