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freedreno/ir3: rework location of driver constants
[mesa.git]
/
src
/
gallium
/
drivers
/
freedreno
/
ir3
/
ir3_shader.c
diff --git
a/src/gallium/drivers/freedreno/ir3/ir3_shader.c
b/src/gallium/drivers/freedreno/ir3/ir3_shader.c
index 501382fb71e21780c3ae4a48ad58d64017f3e2a0..4da7246a0cf3e0f3ba265d8283a3e9f2c2aa5f81 100644
(file)
--- a/
src/gallium/drivers/freedreno/ir3/ir3_shader.c
+++ b/
src/gallium/drivers/freedreno/ir3/ir3_shader.c
@@
-294,7
+294,6
@@
ir3_shader_create(struct ir3_compiler *compiler,
tgsi_dump(cso->tokens, 0);
}
nir = ir3_tgsi_to_nir(cso->tokens);
tgsi_dump(cso->tokens, 0);
}
nir = ir3_tgsi_to_nir(cso->tokens);
- shader->from_tgsi = true;
}
/* do first pass optimization, ignoring the key: */
shader->nir = ir3_optimize_nir(shader, nir, NULL);
}
/* do first pass optimization, ignoring the key: */
shader->nir = ir3_optimize_nir(shader, nir, NULL);
@@
-309,7
+308,8
@@
ir3_shader_create(struct ir3_compiler *compiler,
* (as otherwise nothing will trigger the shader to be
* actually compiled)
*/
* (as otherwise nothing will trigger the shader to be
* actually compiled)
*/
- static struct ir3_shader_key key = {{0}};
+ static struct ir3_shader_key key;
+ memset(&key, 0, sizeof(key));
ir3_shader_variant(shader, key, debug);
}
return shader;
ir3_shader_variant(shader, key, debug);
}
return shader;
@@
-366,7
+366,7
@@
ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin)
}
for (i = 0; i < so->immediates_count; i++) {
}
for (i = 0; i < so->immediates_count; i++) {
- debug_printf("@const(c%d.x)\t", so->
first_
immediate + i);
+ debug_printf("@const(c%d.x)\t", so->
constbase.
immediate + i);
debug_printf("0x%08x, 0x%08x, 0x%08x, 0x%08x\n",
so->immediates[i].val[0],
so->immediates[i].val[1],
debug_printf("0x%08x, 0x%08x, 0x%08x, 0x%08x\n",
so->immediates[i].val[0],
so->immediates[i].val[1],
@@
-469,6
+469,12
@@
ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin)
debug_printf("\n");
}
debug_printf("\n");
}
+uint64_t
+ir3_shader_outputs(const struct ir3_shader *so)
+{
+ return so->nir->info->outputs_written;
+}
+
/* This has to reach into the fd_context a bit more than the rest of
* ir3, but it needs to be aligned with the compiler, so both agree
* on which const regs hold what. And the logic is identical between
/* This has to reach into the fd_context a bit more than the rest of
* ir3, but it needs to be aligned with the compiler, so both agree
* on which const regs hold what. And the logic is identical between
@@
-497,7
+503,7
@@
emit_user_consts(struct fd_context *ctx, const struct ir3_shader_variant *v,
* the user consts early to avoid HLSQ lockup caused by
* writing too many consts
*/
* the user consts early to avoid HLSQ lockup caused by
* writing too many consts
*/
- uint32_t max_const = MIN2(v->
first_driver_param
, v->constlen);
+ uint32_t max_const = MIN2(v->
num_uniforms
, v->constlen);
// I expect that size should be a multiple of vec4's:
assert(size == align(size, 4));
// I expect that size should be a multiple of vec4's:
assert(size == align(size, 4));
@@
-521,9
+527,9
@@
static void
emit_ubos(struct fd_context *ctx, const struct ir3_shader_variant *v,
struct fd_ringbuffer *ring, struct fd_constbuf_stateobj *constbuf)
{
emit_ubos(struct fd_context *ctx, const struct ir3_shader_variant *v,
struct fd_ringbuffer *ring, struct fd_constbuf_stateobj *constbuf)
{
- uint32_t offset = v->
first_driver_param + IR3_UBOS_OFF
;
+ uint32_t offset = v->
constbase.ubo
;
if (v->constlen > offset) {
if (v->constlen > offset) {
- uint32_t params =
MIN2(4, v->constlen - offset) * 4
;
+ uint32_t params =
v->num_ubos
;
uint32_t offsets[params];
struct pipe_resource *prscs[params];
uint32_t offsets[params];
struct pipe_resource *prscs[params];
@@
-551,7
+557,7
@@
emit_immediates(struct fd_context *ctx, const struct ir3_shader_variant *v,
struct fd_ringbuffer *ring)
{
int size = v->immediates_count;
struct fd_ringbuffer *ring)
{
int size = v->immediates_count;
- uint32_t base = v->
first_
immediate;
+ uint32_t base = v->
constbase.
immediate;
/* truncate size to avoid writing constants that shader
* does not use:
/* truncate size to avoid writing constants that shader
* does not use:
@@
-575,7
+581,7
@@
emit_tfbos(struct fd_context *ctx, const struct ir3_shader_variant *v,
struct fd_ringbuffer *ring)
{
/* streamout addresses after driver-params: */
struct fd_ringbuffer *ring)
{
/* streamout addresses after driver-params: */
- uint32_t offset = v->
first_driver_param + IR3_TFBOS_OFF
;
+ uint32_t offset = v->
constbase.tfbo
;
if (v->constlen > offset) {
struct fd_streamout_stateobj *so = &ctx->streamout;
struct pipe_stream_output_info *info = &v->shader->stream_output;
if (v->constlen > offset) {
struct fd_streamout_stateobj *so = &ctx->streamout;
struct pipe_stream_output_info *info = &v->shader->stream_output;
@@
-674,8
+680,8
@@
ir3_emit_consts(const struct ir3_shader_variant *v, struct fd_ringbuffer *ring,
/* emit driver params every time: */
/* TODO skip emit if shader doesn't use driver params to avoid WFI.. */
if (info && (v->type == SHADER_VERTEX)) {
/* emit driver params every time: */
/* TODO skip emit if shader doesn't use driver params to avoid WFI.. */
if (info && (v->type == SHADER_VERTEX)) {
- uint32_t offset = v->
first_driver_param + IR3_DRIVER_PARAM_OFF
;
- if (v->constlen >
=
offset) {
+ uint32_t offset = v->
constbase.driver_param
;
+ if (v->constlen > offset) {
uint32_t vertex_params[IR3_DP_COUNT] = {
[IR3_DP_VTXID_BASE] = info->indexed ?
info->index_bias : info->start,
uint32_t vertex_params[IR3_DP_COUNT] = {
[IR3_DP_VTXID_BASE] = info->indexed ?
info->index_bias : info->start,