+static void
+clear_color(struct iris_context *ice,
+ struct pipe_resource *p_res,
+ unsigned level,
+ const struct pipe_box *box,
+ bool render_condition_enabled,
+ enum isl_format format,
+ struct isl_swizzle swizzle,
+ union isl_color_value color)
+{
+ struct iris_resource *res = (void *) p_res;
+
+ struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
+ const struct gen_device_info *devinfo = &batch->screen->devinfo;
+ enum blorp_batch_flags blorp_flags = 0;
+
+ if (render_condition_enabled) {
+ if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
+ return;
+
+ if (ice->state.predicate == IRIS_PREDICATE_STATE_USE_BIT)
+ blorp_flags |= BLORP_BATCH_PREDICATE_ENABLE;
+ }
+
+ if (p_res->target == PIPE_BUFFER)
+ util_range_add(&res->valid_buffer_range, box->x, box->x + box->width);
+
+ iris_batch_maybe_flush(batch, 1500);
+
+ bool can_fast_clear = can_fast_clear_color(ice, p_res, level, box,
+ res->surf.format, format, color);
+ if (can_fast_clear) {
+ fast_clear_color(ice, res, level, box, format, color,
+ blorp_flags);
+ return;
+ }
+
+ bool color_write_disable[4] = { false, false, false, false };
+ enum isl_aux_usage aux_usage =
+ iris_resource_render_aux_usage(ice, res, format,
+ false, false);
+
+ iris_resource_prepare_render(ice, batch, res, level,
+ box->z, box->depth, aux_usage);
+
+ struct blorp_surf surf;
+ iris_blorp_surf_for_resource(&ice->vtbl, &surf, p_res, aux_usage, level,
+ true);
+
+ struct blorp_batch blorp_batch;
+ blorp_batch_init(&ice->blorp, &blorp_batch, batch, blorp_flags);
+
+ if (!isl_format_supports_rendering(devinfo, format) &&
+ isl_format_is_rgbx(format))
+ format = isl_format_rgbx_to_rgba(format);
+
+ blorp_clear(&blorp_batch, &surf, format, swizzle,
+ level, box->z, box->depth, box->x, box->y,
+ box->x + box->width, box->y + box->height,
+ color, color_write_disable);
+
+ blorp_batch_finish(&blorp_batch);
+ iris_flush_and_dirty_for_history(ice, batch, res);
+
+ iris_resource_finish_render(ice, res, level,
+ box->z, box->depth, aux_usage);
+}
+
+static bool
+can_fast_clear_depth(struct iris_context *ice,
+ struct iris_resource *res,
+ unsigned level,
+ const struct pipe_box *box,
+ float depth)
+{
+ struct pipe_resource *p_res = (void *) res;
+
+ /* Check for partial clears */
+ if (box->x > 0 || box->y > 0 ||
+ box->width < u_minify(p_res->width0, level) ||
+ box->height < u_minify(p_res->height0, level)) {
+ return false;
+ }
+
+ if (!(res->aux.has_hiz & (1 << level)))
+ return false;
+
+ return true;
+}
+
+static void
+fast_clear_depth(struct iris_context *ice,
+ struct iris_resource *res,
+ unsigned level,
+ const struct pipe_box *box,
+ float depth)
+{
+ struct pipe_resource *p_res = (void *) res;
+ struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
+
+ /* Quantize the clear value to what can be stored in the actual depth
+ * buffer. This makes the following check more accurate because it now
+ * checks if the actual depth bits will match. It also prevents us from
+ * getting a too-accurate depth value during depth testing or when sampling
+ * with HiZ enabled.
+ */
+ const unsigned nbits = p_res->format == PIPE_FORMAT_Z16_UNORM ? 16 : 24;
+ const uint32_t depth_max = (1 << nbits) - 1;
+ depth = p_res->format == PIPE_FORMAT_Z32_FLOAT ? depth :
+ (unsigned)(depth * depth_max) / (float)depth_max;
+
+ bool update_clear_depth = false;
+
+ /* If we're clearing to a new clear value, then we need to resolve any clear
+ * flags out of the HiZ buffer into the real depth buffer.
+ */
+ if (res->aux.clear_color.f32[0] != depth) {
+ /* We decided that we are going to fast clear, and the color is
+ * changing. But if we have a predicate bit set, the predication
+ * affects whether we should clear or not, and if we shouldn't, we
+ * also shouldn't update the clear color.
+ *
+ * However, we can't simply predicate-update the clear color (the
+ * commands don't support that). And we would lose track of the
+ * color, preventing us from doing some optimizations later.
+ *
+ * For depth clears, things are even more complicated, because here we
+ * resolve the other levels/layers if they have a different color than
+ * the current one. That resolve can be predicated, but we also set those
+ * layers as ISL_AUX_STATE_RESOLVED, and this can't be predicated.
+ * Keeping track of the aux state when predication is involved is just
+ * even more complex, so the easiest thing to do when the fast clear
+ * depth is changing is to stall on the CPU and resolve the predication.
+ */
+ iris_resolve_conditional_render(ice);
+ if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
+ return;
+
+ for (unsigned res_level = 0; res_level < res->surf.levels; res_level++) {
+ if (!(res->aux.has_hiz & (1 << res_level)))
+ continue;
+
+ const unsigned level_layers =
+ iris_get_num_logical_layers(res, res_level);
+ for (unsigned layer = 0; layer < level_layers; layer++) {
+ if (res_level == level &&
+ layer >= box->z &&
+ layer < box->z + box->depth) {
+ /* We're going to clear this layer anyway. Leave it alone. */
+ continue;
+ }
+
+ enum isl_aux_state aux_state =
+ iris_resource_get_aux_state(res, res_level, layer);
+
+ if (aux_state != ISL_AUX_STATE_CLEAR &&
+ aux_state != ISL_AUX_STATE_COMPRESSED_CLEAR) {
+ /* This slice doesn't have any fast-cleared bits. */
+ continue;
+ }
+
+ /* If we got here, then the level may have fast-clear bits that
+ * use the old clear value. We need to do a depth resolve to get
+ * rid of their use of the clear value before we can change it.
+ * Fortunately, few applications ever change their depth clear
+ * value so this shouldn't happen often.
+ */
+ iris_hiz_exec(ice, batch, res, res_level, layer, 1,
+ ISL_AUX_OP_FULL_RESOLVE, false);
+ iris_resource_set_aux_state(ice, res, res_level, layer, 1,
+ ISL_AUX_STATE_RESOLVED);
+ }
+ }
+ const union isl_color_value clear_value = { .f32 = {depth, } };
+ iris_resource_set_clear_color(ice, res, clear_value);
+ update_clear_depth = true;
+ }
+
+ for (unsigned l = 0; l < box->depth; l++) {
+ enum isl_aux_state aux_state =
+ iris_resource_get_aux_state(res, level, box->z + l);
+ if (aux_state != ISL_AUX_STATE_CLEAR) {
+ iris_hiz_exec(ice, batch, res, level,
+ box->z + l, 1, ISL_AUX_OP_FAST_CLEAR,
+ update_clear_depth);
+ }
+ }
+
+ iris_resource_set_aux_state(ice, res, level, box->z, box->depth,
+ ISL_AUX_STATE_CLEAR);
+ ice->state.dirty |= IRIS_DIRTY_DEPTH_BUFFER;
+}
+
+static void
+clear_depth_stencil(struct iris_context *ice,
+ struct pipe_resource *p_res,
+ unsigned level,
+ const struct pipe_box *box,
+ bool render_condition_enabled,
+ bool clear_depth,
+ bool clear_stencil,
+ float depth,
+ uint8_t stencil)
+{
+ struct iris_resource *res = (void *) p_res;
+
+ struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
+ enum blorp_batch_flags blorp_flags = 0;
+
+ if (render_condition_enabled) {
+ if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
+ return;
+
+ if (ice->state.predicate == IRIS_PREDICATE_STATE_USE_BIT)
+ blorp_flags |= BLORP_BATCH_PREDICATE_ENABLE;
+ }
+
+ iris_batch_maybe_flush(batch, 1500);
+
+ struct iris_resource *z_res;
+ struct iris_resource *stencil_res;
+ struct blorp_surf z_surf;
+ struct blorp_surf stencil_surf;
+
+ iris_get_depth_stencil_resources(p_res, &z_res, &stencil_res);
+ if (z_res && clear_depth &&
+ can_fast_clear_depth(ice, z_res, level, box, depth)) {
+ fast_clear_depth(ice, z_res, level, box, depth);
+ iris_flush_and_dirty_for_history(ice, batch, res);
+ clear_depth = false;
+ z_res = false;
+ }
+
+ /* At this point, we might have fast cleared the depth buffer. So if there's
+ * no stencil clear pending, return early.
+ */
+ if (!(clear_depth || clear_stencil)) {
+ return;
+ }
+
+ if (z_res) {
+ iris_resource_prepare_depth(ice, batch, z_res, level, box->z, box->depth);
+ iris_blorp_surf_for_resource(&ice->vtbl, &z_surf, &z_res->base,
+ z_res->aux.usage, level, true);
+ }
+
+ struct blorp_batch blorp_batch;
+ blorp_batch_init(&ice->blorp, &blorp_batch, batch, blorp_flags);
+
+ if (stencil_res) {
+ iris_blorp_surf_for_resource(&ice->vtbl, &stencil_surf,
+ &stencil_res->base, stencil_res->aux.usage,
+ level, true);
+ }
+
+ blorp_clear_depth_stencil(&blorp_batch, &z_surf, &stencil_surf,
+ level, box->z, box->depth,
+ box->x, box->y,
+ box->x + box->width,
+ box->y + box->height,
+ clear_depth && z_res, depth,
+ clear_stencil && stencil_res ? 0xff : 0, stencil);
+
+ blorp_batch_finish(&blorp_batch);
+ iris_flush_and_dirty_for_history(ice, batch, res);
+
+ if (z_res) {
+ iris_resource_finish_depth(ice, z_res, level,
+ box->z, box->depth, true);
+ }
+}
+
+/**
+ * The pipe->clear() driver hook.
+ *
+ * This clears buffers attached to the current draw framebuffer.
+ */