+ struct iris_resource *res,
+ uint32_t extra_flags,
+ const char *reason);
+
+unsigned iris_get_num_logical_layers(const struct iris_resource *res,
+ unsigned level);
+
+void iris_resource_disable_aux(struct iris_resource *res);
+
+#define INTEL_REMAINING_LAYERS UINT32_MAX
+#define INTEL_REMAINING_LEVELS UINT32_MAX
+
+void
+iris_hiz_exec(struct iris_context *ice,
+ struct iris_batch *batch,
+ struct iris_resource *res,
+ unsigned int level, unsigned int start_layer,
+ unsigned int num_layers, enum isl_aux_op op,
+ bool update_clear_depth);
+
+/**
+ * Prepare a miptree for access
+ *
+ * This function should be called prior to any access to miptree in order to
+ * perform any needed resolves.
+ *
+ * \param[in] start_level The first mip level to be accessed
+ *
+ * \param[in] num_levels The number of miplevels to be accessed or
+ * INTEL_REMAINING_LEVELS to indicate every level
+ * above start_level will be accessed
+ *
+ * \param[in] start_layer The first array slice or 3D layer to be accessed
+ *
+ * \param[in] num_layers The number of array slices or 3D layers be
+ * accessed or INTEL_REMAINING_LAYERS to indicate
+ * every layer above start_layer will be accessed
+ *
+ * \param[in] aux_supported Whether or not the access will support the
+ * miptree's auxiliary compression format; this
+ * must be false for uncompressed miptrees
+ *
+ * \param[in] fast_clear_supported Whether or not the access will support
+ * fast clears in the miptree's auxiliary
+ * compression format
+ */
+void
+iris_resource_prepare_access(struct iris_context *ice,
+ struct iris_batch *batch,
+ struct iris_resource *res,
+ uint32_t start_level, uint32_t num_levels,
+ uint32_t start_layer, uint32_t num_layers,
+ enum isl_aux_usage aux_usage,
+ bool fast_clear_supported);
+
+/**
+ * Complete a write operation
+ *
+ * This function should be called after any operation writes to a miptree.
+ * This will update the miptree's compression state so that future resolves
+ * happen correctly. Technically, this function can be called before the
+ * write occurs but the caller must ensure that they don't interlace
+ * iris_resource_prepare_access and iris_resource_finish_write calls to
+ * overlapping layer/level ranges.
+ *
+ * \param[in] level The mip level that was written
+ *
+ * \param[in] start_layer The first array slice or 3D layer written
+ *
+ * \param[in] num_layers The number of array slices or 3D layers
+ * written or INTEL_REMAINING_LAYERS to indicate
+ * every layer above start_layer was written
+ *
+ * \param[in] written_with_aux Whether or not the write was done with
+ * auxiliary compression enabled
+ */
+void
+iris_resource_finish_write(struct iris_context *ice,
+ struct iris_resource *res, uint32_t level,
+ uint32_t start_layer, uint32_t num_layers,
+ enum isl_aux_usage aux_usage);
+
+/** Get the auxiliary compression state of a miptree slice */
+enum isl_aux_state
+iris_resource_get_aux_state(const struct iris_resource *res,
+ uint32_t level, uint32_t layer);
+
+/**
+ * Set the auxiliary compression state of a miptree slice range
+ *
+ * This function directly sets the auxiliary compression state of a slice
+ * range of a miptree. It only modifies data structures and does not do any
+ * resolves. This should only be called by code which directly performs
+ * compression operations such as fast clears and resolves. Most code should
+ * use iris_resource_prepare_access or iris_resource_finish_write.
+ */
+void
+iris_resource_set_aux_state(struct iris_context *ice,
+ struct iris_resource *res, uint32_t level,
+ uint32_t start_layer, uint32_t num_layers,
+ enum isl_aux_state aux_state);
+
+/**
+ * Prepare a miptree for raw access
+ *
+ * This helper prepares the miptree for access that knows nothing about any
+ * sort of compression whatsoever. This is useful when mapping the surface or
+ * using it with the blitter.
+ */
+static inline void
+iris_resource_access_raw(struct iris_context *ice,
+ struct iris_batch *batch,
+ struct iris_resource *res,
+ uint32_t level, uint32_t layer,
+ uint32_t num_layers,
+ bool write)
+{
+ iris_resource_prepare_access(ice, batch, res, level, 1, layer, num_layers,
+ ISL_AUX_USAGE_NONE, false);
+ if (write) {
+ iris_resource_finish_write(ice, res, level, layer, num_layers,
+ ISL_AUX_USAGE_NONE);
+ }
+}
+
+enum isl_dim_layout iris_get_isl_dim_layout(const struct gen_device_info *devinfo,
+ enum isl_tiling tiling,
+ enum pipe_texture_target target);
+enum isl_surf_dim target_to_isl_surf_dim(enum pipe_texture_target target);
+uint32_t iris_resource_get_tile_offsets(const struct iris_resource *res,
+ uint32_t level, uint32_t z,
+ uint32_t *tile_x, uint32_t *tile_y);
+enum isl_aux_usage iris_resource_texture_aux_usage(struct iris_context *ice,
+ const struct iris_resource *res,
+ enum isl_format view_fmt,
+ enum gen9_astc5x5_wa_tex_type);
+void iris_resource_prepare_texture(struct iris_context *ice,
+ struct iris_batch *batch,
+ struct iris_resource *res,
+ enum isl_format view_format,
+ uint32_t start_level, uint32_t num_levels,
+ uint32_t start_layer, uint32_t num_layers,
+ enum gen9_astc5x5_wa_tex_type);
+void iris_resource_prepare_image(struct iris_context *ice,
+ struct iris_batch *batch,
+ struct iris_resource *res);
+
+static inline bool
+iris_resource_unfinished_aux_import(struct iris_resource *res)
+{
+ return res->base.next != NULL && res->mod_info &&
+ res->mod_info->aux_usage != ISL_AUX_USAGE_NONE;
+}
+
+void iris_resource_finish_aux_import(struct pipe_screen *pscreen,
+ struct iris_resource *res);
+
+bool iris_has_color_unresolved(const struct iris_resource *res,
+ unsigned start_level, unsigned num_levels,
+ unsigned start_layer, unsigned num_layers);
+
+void iris_resource_check_level_layer(const struct iris_resource *res,
+ uint32_t level, uint32_t layer);
+
+bool iris_resource_level_has_hiz(const struct iris_resource *res,
+ uint32_t level);
+bool iris_has_color_unresolved(const struct iris_resource *res,
+ unsigned start_level, unsigned num_levels,
+ unsigned start_layer, unsigned num_layers);