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nvc0/ir: make it possible to have the flags def in def0
[mesa.git]
/
src
/
gallium
/
drivers
/
nouveau
/
codegen
/
nv50_ir.h
diff --git
a/src/gallium/drivers/nouveau/codegen/nv50_ir.h
b/src/gallium/drivers/nouveau/codegen/nv50_ir.h
index c52e86194633a40073bb1a8cde99431127a054c0..e161a5a04922725ef00d33679b845c555c1cabc3 100644
(file)
--- a/
src/gallium/drivers/nouveau/codegen/nv50_ir.h
+++ b/
src/gallium/drivers/nouveau/codegen/nv50_ir.h
@@
-57,6
+57,7
@@
enum operation
OP_MAD,
OP_FMA,
OP_SAD, // abs(src0 - src1) + src2
OP_MAD,
OP_FMA,
OP_SAD, // abs(src0 - src1) + src2
+ OP_SHLADD,
OP_ABS,
OP_NEG,
OP_NOT,
OP_ABS,
OP_NEG,
OP_NOT,
@@
-174,6
+175,7
@@
enum operation
#define NV50_IR_SUBOP_LDC_IS 2
#define NV50_IR_SUBOP_LDC_ISL 3
#define NV50_IR_SUBOP_SHIFT_WRAP 1
#define NV50_IR_SUBOP_LDC_IS 2
#define NV50_IR_SUBOP_LDC_ISL 3
#define NV50_IR_SUBOP_SHIFT_WRAP 1
+#define NV50_IR_SUBOP_SHIFT_HIGH 2
#define NV50_IR_SUBOP_EMU_PRERET 1
#define NV50_IR_SUBOP_TEXBAR(n) n
#define NV50_IR_SUBOP_MOV_FINAL 1
#define NV50_IR_SUBOP_EMU_PRERET 1
#define NV50_IR_SUBOP_TEXBAR(n) n
#define NV50_IR_SUBOP_MOV_FINAL 1
@@
-250,6
+252,10
@@
enum operation
#define NV50_IR_SUBOP_VOTE_ANY 1
#define NV50_IR_SUBOP_VOTE_UNI 2
#define NV50_IR_SUBOP_VOTE_ANY 1
#define NV50_IR_SUBOP_VOTE_UNI 2
+#define NV50_IR_SUBOP_MINMAX_LOW 1
+#define NV50_IR_SUBOP_MINMAX_MED 2
+#define NV50_IR_SUBOP_MINMAX_HIGH 3
+
enum DataType
{
TYPE_NONE,
enum DataType
{
TYPE_NONE,
@@
-364,6
+370,67
@@
enum TexTarget
TEX_TARGET_COUNT
};
TEX_TARGET_COUNT
};
+enum ImgFormat
+{
+ FMT_NONE,
+
+ FMT_RGBA32F,
+ FMT_RGBA16F,
+ FMT_RG32F,
+ FMT_RG16F,
+ FMT_R11G11B10F,
+ FMT_R32F,
+ FMT_R16F,
+
+ FMT_RGBA32UI,
+ FMT_RGBA16UI,
+ FMT_RGB10A2UI,
+ FMT_RGBA8UI,
+ FMT_RG32UI,
+ FMT_RG16UI,
+ FMT_RG8UI,
+ FMT_R32UI,
+ FMT_R16UI,
+ FMT_R8UI,
+
+ FMT_RGBA32I,
+ FMT_RGBA16I,
+ FMT_RGBA8I,
+ FMT_RG32I,
+ FMT_RG16I,
+ FMT_RG8I,
+ FMT_R32I,
+ FMT_R16I,
+ FMT_R8I,
+
+ FMT_RGBA16,
+ FMT_RGB10A2,
+ FMT_RGBA8,
+ FMT_RG16,
+ FMT_RG8,
+ FMT_R16,
+ FMT_R8,
+
+ FMT_RGBA16_SNORM,
+ FMT_RGBA8_SNORM,
+ FMT_RG16_SNORM,
+ FMT_RG8_SNORM,
+ FMT_R16_SNORM,
+ FMT_R8_SNORM,
+
+ FMT_BGRA8,
+
+ IMG_FORMAT_COUNT,
+};
+
+enum ImgType {
+ UINT,
+ SINT,
+ UNORM,
+ SNORM,
+ FLOAT,
+};
+
enum SVSemantic
{
SV_POSITION, // WPOS
enum SVSemantic
{
SV_POSITION, // WPOS
@@
-402,6
+469,7
@@
enum SVSemantic
SV_BASEVERTEX,
SV_BASEINSTANCE,
SV_DRAWID,
SV_BASEVERTEX,
SV_BASEINSTANCE,
SV_DRAWID,
+ SV_WORK_DIM,
SV_UNDEFINED,
SV_LAST
};
SV_UNDEFINED,
SV_LAST
};
@@
-594,7
+662,7
@@
public:
inline const Symbol *asSym() const;
inline const ImmediateValue *asImm() const;
inline const Symbol *asSym() const;
inline const ImmediateValue *asImm() const;
- inline bool inFile(DataFile f) { return reg.file == f; }
+ inline bool inFile(DataFile f)
const
{ return reg.file == f; }
static inline Value *get(Iterator&);
static inline Value *get(Iterator&);
@@
-772,6
+840,10
@@
public:
bool isActionEqual(const Instruction *) const;
bool isResultEqual(const Instruction *) const;
bool isActionEqual(const Instruction *) const;
bool isResultEqual(const Instruction *) const;
+ // check whether the defs interfere with srcs and defs of another instruction
+ bool canCommuteDefDef(const Instruction *) const;
+ bool canCommuteDefSrc(const Instruction *) const;
+
void print() const;
inline CmpInstruction *asCmp();
void print() const;
inline CmpInstruction *asCmp();
@@
-900,6
+972,18
@@
public:
enum TexTarget target;
};
enum TexTarget target;
};
+public:
+ struct ImgFormatDesc
+ {
+ char name[19];
+ uint8_t components;
+ uint8_t bits[4];
+ ImgType type;
+ bool bgra;
+ };
+
+ static const struct ImgFormatDesc formatTable[IMG_FORMAT_COUNT];
+
public:
TexInstruction(Function *, operation);
virtual ~TexInstruction();
public:
TexInstruction(Function *, operation);
virtual ~TexInstruction();
@@
-939,6
+1023,7
@@
public:
int8_t offset[3]; // only used on nv50
enum TexQuery query;
int8_t offset[3]; // only used on nv50
enum TexQuery query;
+ const struct ImgFormatDesc *format;
} tex;
ValueRef dPdx[3];
} tex;
ValueRef dPdx[3];