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Merge branch '7.8'
[mesa.git]
/
src
/
gallium
/
drivers
/
nv50
/
nv50_tex.c
diff --git
a/src/gallium/drivers/nv50/nv50_tex.c
b/src/gallium/drivers/nv50/nv50_tex.c
index c5029bad2d8784d0c4062aa0110be7d11d9d4b20..85ab947c0063eae6afb15cf51f4246e0db618100 100644
(file)
--- a/
src/gallium/drivers/nv50/nv50_tex.c
+++ b/
src/gallium/drivers/nv50/nv50_tex.c
@@
-54,8
+54,8
@@
static const uint32_t nv50_texture_formats[PIPE_FORMAT_COUNT] =
_(A8_UNORM, UNORM, ZERO, ZERO, ZERO, C0, 8),
_(I8_UNORM, UNORM, C0, C0, C0, C0, 8),
_(A8_UNORM, UNORM, ZERO, ZERO, ZERO, C0, 8),
_(I8_UNORM, UNORM, C0, C0, C0, C0, 8),
- _(
A8L
8_UNORM, UNORM, C0, C0, C0, C1, 8_8),
- _(
A8L
8_SRGB, UNORM, C0, C0, C0, C1, 8_8),
+ _(
L8A
8_UNORM, UNORM, C0, C0, C0, C1, 8_8),
+ _(
L8A
8_SRGB, UNORM, C0, C0, C0, C1, 8_8),
_(DXT1_RGB, UNORM, C0, C1, C2, ONE, DXT1),
_(DXT1_RGBA, UNORM, C0, C1, C2, C3, DXT1),
_(DXT1_RGB, UNORM, C0, C1, C2, ONE, DXT1),
_(DXT1_RGBA, UNORM, C0, C1, C2, C3, DXT1),
@@
-105,7
+105,7
@@
nv50_tex_construct(struct nv50_sampler_view *view)
struct nv50_miptree *mt = nv50_miptree(view->pipe.texture);
uint32_t swz[4], *tic = view->tic;
struct nv50_miptree *mt = nv50_miptree(view->pipe.texture);
uint32_t swz[4], *tic = view->tic;
- tic[0] = nv50_texture_formats[
mt->base.bas
e.format];
+ tic[0] = nv50_texture_formats[
view->pip
e.format];
swz[0] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_r);
swz[1] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_g);
swz[0] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_r);
swz[1] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_g);
@@
-152,8
+152,7
@@
nv50_tex_construct(struct nv50_sampler_view *view)
tic[6] = 0x03000000;
tic[6] = 0x03000000;
- tic[7] = (view->pipe.num_levels - view->pipe.first_level - 1) << 4;
- tic[7] |= view->pipe.first_level;
+ tic[7] = (view->pipe.last_level << 4) | view->pipe.first_level;
return TRUE;
}
return TRUE;
}
@@
-221,23
+220,25
@@
nv50_tex_relocs(struct nv50_context *nv50)
int p, unit;
p = PIPE_SHADER_FRAGMENT;
int p, unit;
p = PIPE_SHADER_FRAGMENT;
- for (unit = 0; unit < nv50->miptree_nr[p]; unit++) {
- if (!nv50->miptree[p][unit])
+ for (unit = 0; unit < nv50->sampler_view_nr[p]; unit++) {
+ struct pipe_sampler_view *view = nv50->sampler_views[p][unit];
+ if (!view)
continue;
nouveau_reloc_emit(chan, nv50->screen->tic,
((p * 32) + unit) * 32, NULL,
continue;
nouveau_reloc_emit(chan, nv50->screen->tic,
((p * 32) + unit) * 32, NULL,
- nv50
->miptree[p][unit]
->base.bo, 0, 0,
+ nv50
_miptree(view->texture)
->base.bo, 0, 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
NOUVEAU_BO_RD, 0, 0);
}
p = PIPE_SHADER_VERTEX;
NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
NOUVEAU_BO_RD, 0, 0);
}
p = PIPE_SHADER_VERTEX;
- for (unit = 0; unit < nv50->miptree_nr[p]; unit++) {
- if (!nv50->miptree[p][unit])
+ for (unit = 0; unit < nv50->sampler_view_nr[p]; unit++) {
+ struct pipe_sampler_view *view = nv50->sampler_views[p][unit];
+ if (!view)
continue;
nouveau_reloc_emit(chan, nv50->screen->tic,
((p * 32) + unit) * 32, NULL,
continue;
nouveau_reloc_emit(chan, nv50->screen->tic,
((p * 32) + unit) * 32, NULL,
- nv50
->miptree[p][unit]
->base.bo, 0, 0,
+ nv50
_miptree(view->texture)
->base.bo, 0, 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
NOUVEAU_BO_RD, 0, 0);
}
NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
NOUVEAU_BO_RD, 0, 0);
}