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lima/gpir: Always schedule complex2 and *_impl right after complex1
[mesa.git]
/
src
/
gallium
/
drivers
/
r300
/
compiler
/
radeon_opcodes.h
diff --git
a/src/gallium/drivers/r300/compiler/radeon_opcodes.h
b/src/gallium/drivers/r300/compiler/radeon_opcodes.h
index 9c4b456168afa4c45ae913f9922bb66fe8e510b7..1c425050727e2c1f607926a92e9d621e16484978 100644
(file)
--- a/
src/gallium/drivers/r300/compiler/radeon_opcodes.h
+++ b/
src/gallium/drivers/r300/compiler/radeon_opcodes.h
@@
-47,6
+47,10
@@
typedef enum {
* dst.x = floor(src.x), where dst must be an address register */
RC_OPCODE_ARL,
* dst.x = floor(src.x), where dst must be an address register */
RC_OPCODE_ARL,
+ /** special instruction: load address register with round
+ * dst.x = round(src.x), where dst must be an address register */
+ RC_OPCODE_ARR,
+
/** vec4 instruction: dst.c = ceil(src0.c) */
RC_OPCODE_CEIL,
/** vec4 instruction: dst.c = ceil(src0.c) */
RC_OPCODE_CEIL,
@@
-175,6
+179,9
@@
typedef enum {
/** vec4 instruction: dst.c = src0.c */
RC_OPCODE_SWZ,
/** vec4 instruction: dst.c = src0.c */
RC_OPCODE_SWZ,
+ /** vec4 instruction: dst.c = (abs(src0.c) - fract(abs(src0.c))) * sgn(src0.c) */
+ RC_OPCODE_TRUNC,
+
/** special instruction, see ARB_fragment_program */
RC_OPCODE_XPD,
/** special instruction, see ARB_fragment_program */
RC_OPCODE_XPD,