- switch (cf->inst) {
- case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
- case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3):
- case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3):
- case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
- bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
- S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
- S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
- S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
- bc->bytecode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(cf->inst >> 3) |
- S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) |
- S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) |
- S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) |
+ if (cf->op == CF_NATIVE) {
+ bc->bytecode[id++] = cf->isa[0];
+ bc->bytecode[id++] = cf->isa[1];
+ } else {
+ const struct cf_op_info *cfop = r600_isa_cf(cf->op);
+ unsigned opcode = r600_isa_cf_opcode(bc->isa->hw_class, cf->op);
+ if (cfop->flags & CF_ALU) { /* ALU clauses */
+
+ /* prepend ALU_EXTENDED if we need more than 2 kcache sets */
+ if (cf->eg_alu_extended) {
+ bc->bytecode[id++] =
+ S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE0(V_SQ_CF_INDEX_NONE) |
+ S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE1(V_SQ_CF_INDEX_NONE) |
+ S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE2(V_SQ_CF_INDEX_NONE) |
+ S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE3(V_SQ_CF_INDEX_NONE) |
+ S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK2(cf->kcache[2].bank) |
+ S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK3(cf->kcache[3].bank) |
+ S_SQ_CF_ALU_WORD0_EXT_KCACHE_MODE2(cf->kcache[2].mode);
+ bc->bytecode[id++] =
+ S_SQ_CF_ALU_WORD1_EXT_CF_INST(
+ r600_isa_cf_opcode(bc->isa->hw_class, CF_OP_ALU_EXT)) |
+ S_SQ_CF_ALU_WORD1_EXT_KCACHE_MODE3(cf->kcache[3].mode) |
+ S_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR2(cf->kcache[2].addr) |
+ S_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR3(cf->kcache[3].addr) |
+ S_SQ_CF_ALU_WORD1_EXT_BARRIER(1);
+ }
+ bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
+ S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
+ S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
+ S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
+ bc->bytecode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(opcode) |
+ S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) |
+ S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) |
+ S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) |