-static void r600_blit_state_vs_shader(struct r600_screen *rscreen, struct radeon_state *rstate)
-{
- struct radeon_ws_bo *bo;
- void *data;
- u32 shader_bc_r600[] = {
- 0x00000004, 0x81000400,
- 0x00000008, 0xA01C0000,
- 0xC001A03C, 0x94000688,
- 0xC0024000, 0x94200688,
- 0x7C000000, 0x002D1001,
- 0x00080000, 0x00000000,
- 0x7C000100, 0x002D1002,
- 0x00080000, 0x00000000,
- 0x00000001, 0x00601910,
- 0x00000401, 0x20601910,
- 0x00000801, 0x40601910,
- 0x80000C01, 0x60601910,
- 0x00000002, 0x00801910,
- 0x00000402, 0x20801910,
- 0x00000802, 0x40801910,
- 0x80000C02, 0x60801910
- };
- u32 shader_bc_r700[] = {
- 0x00000004, 0x81000400,
- 0x00000008, 0xA01C0000,
- 0xC001A03C, 0x94000688,
- 0xC0024000, 0x94200688,
- 0x7C000000, 0x002D1001,
- 0x00080000, 0x00000000,
- 0x7C000100, 0x002D1002,
- 0x00080000, 0x00000000,
- 0x00000001, 0x00600C90,
- 0x00000401, 0x20600C90,
- 0x00000801, 0x40600C90,
- 0x80000C01, 0x60600C90,
- 0x00000002, 0x00800C90,
- 0x00000402, 0x20800C90,
- 0x00000802, 0x40800C90,
- 0x80000C02, 0x60800C90
- };
-
- /* simple shader */
- bo = radeon_ws_bo(rscreen->rw, 128, 4096);
- if (bo == NULL) {
- return;
- }
- data = radeon_ws_bo_map(rscreen->rw, bo);
- if (!data) {
- radeon_ws_bo_reference(rscreen->rw, &bo, NULL);
- return;
- }
- switch (rscreen->chip_class) {
- case R600:
- memcpy(data, shader_bc_r600, 128);
- break;
- case R700:
- memcpy(data, shader_bc_r700, 128);
- break;
- default:
- R600_ERR("unsupported chip family\n");
- radeon_ws_bo_unmap(rscreen->rw, bo);
- radeon_ws_bo_reference(rscreen->rw, &bo, NULL);
- return;
- }
- radeon_ws_bo_unmap(rscreen->rw, bo);
-
- radeon_state_init(rstate, rscreen->rw, R600_STATE_SHADER, 0, R600_SHADER_VS);
-
- /* set states (most default value are 0 and struct already
- * initialized to 0, thus avoid resetting them)
- */
- rstate->states[R600_VS_SHADER__SPI_VS_OUT_ID_0] = 0x03020100;
- rstate->states[R600_VS_SHADER__SPI_VS_OUT_ID_1] = 0x07060504;
- rstate->states[R600_VS_SHADER__SQ_PGM_RESOURCES_VS] = 0x00000005;
-
- rstate->bo[0] = bo;
- radeon_ws_bo_reference(rscreen->rw, &rstate->bo[1], bo);
- rstate->nbo = 2;
- rstate->placement[0] = RADEON_GEM_DOMAIN_GTT;
- rstate->placement[2] = RADEON_GEM_DOMAIN_GTT;
-
- radeon_state_pm4(rstate);
-}