+#define EG_0802C_GRBM_GFX_INDEX 0x802C
+#define S_0802C_INSTANCE_INDEX(x) (((x) & 0xffff) << 0)
+#define S_0802C_SE_INDEX(x) (((x) & 0x3fff) << 16)
+#define S_0802C_INSTANCE_BROADCAST_WRITES(x) (((x) & 0x1) << 30)
+#define S_0802C_SE_BROADCAST_WRITES(x) (((x) & 0x1) << 31)
+
+#define CM_R_028AA8_IA_MULTI_VGT_PARAM 0x028AA8
+#define S_028AA8_PRIMGROUP_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0)
+#define G_028AA8_PRIMGROUP_SIZE(x) (((x) >> 0) & 0xFFFF)
+#define C_028AA8_PRIMGROUP_SIZE 0xFFFF0000
+#define S_028AA8_PARTIAL_VS_WAVE_ON(x) (((unsigned)(x) & 0x1) << 16)
+#define G_028AA8_PARTIAL_VS_WAVE_ON(x) (((x) >> 16) & 0x1)
+#define C_028AA8_PARTIAL_VS_WAVE_ON 0xFFFEFFFF
+#define S_028AA8_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 17)
+#define G_028AA8_SWITCH_ON_EOP(x) (((x) >> 17) & 0x1)
+#define C_028AA8_SWITCH_ON_EOP 0xFFFDFFFF
+
+/* async DMA packets */
+#define DMA_PACKET(cmd, t, s, n) ((((unsigned)(cmd) & 0xF) << 28) | \
+ (((unsigned)(t) & 0x1) << 23) | \
+ (((unsigned)(s) & 0x1) << 22) | \
+ (((unsigned)(n) & 0xFFFF) << 0))
+/* async DMA Packet types */
+#define DMA_PACKET_WRITE 0x2
+#define DMA_PACKET_COPY 0x3
+#define R600_DMA_COPY_MAX_SIZE_DW 0xffff
+#define DMA_PACKET_INDIRECT_BUFFER 0x4
+#define DMA_PACKET_SEMAPHORE 0x5
+#define DMA_PACKET_FENCE 0x6
+#define DMA_PACKET_TRAP 0x7
+#define DMA_PACKET_CONSTANT_FILL 0xd /* 7xx only */
+#define DMA_PACKET_NOP 0xf
+
+
+/* Resource IDs:
+ * PS: 0 .. +160
+ * VS: 160 .. +160
+ * FS: 320 .. +16
+ * GS: 336 .. +160
+ */
+#define R600_FETCH_CONSTANTS_OFFSET_PS 0
+#define R600_FETCH_CONSTANTS_OFFSET_VS 160
+#define R600_FETCH_CONSTANTS_OFFSET_FS 320
+#define R600_FETCH_CONSTANTS_OFFSET_GS 336