+static inline LLVMTypeRef tgsi2llvmtype(
+ struct lp_build_tgsi_context * bld_base,
+ enum tgsi_opcode_type type)
+{
+ LLVMContextRef ctx = bld_base->base.gallivm->context;
+
+ switch (type) {
+ case TGSI_TYPE_UNSIGNED:
+ case TGSI_TYPE_SIGNED:
+ return LLVMInt32TypeInContext(ctx);
+ case TGSI_TYPE_DOUBLE:
+ return LLVMDoubleTypeInContext(ctx);
+ case TGSI_TYPE_UNTYPED:
+ case TGSI_TYPE_FLOAT:
+ return LLVMFloatTypeInContext(ctx);
+ default: break;
+ }
+ return 0;
+}
+
+static inline LLVMValueRef bitcast(
+ struct lp_build_tgsi_context * bld_base,
+ enum tgsi_opcode_type type,
+ LLVMValueRef value
+)
+{
+ LLVMBuilderRef builder = bld_base->base.gallivm->builder;
+ LLVMTypeRef dst_type = tgsi2llvmtype(bld_base, type);
+
+ if (dst_type)
+ return LLVMBuildBitCast(builder, value, dst_type, "");
+ else
+ return value;
+}
+
+
+void radeon_llvm_emit_prepare_cube_coords(struct lp_build_tgsi_context * bld_base,
+ struct lp_build_emit_data * emit_data,
+ LLVMValueRef *coords_arg,
+ LLVMValueRef *derivs_arg);
+