- for (int i = 0; i < NUMBER_OF_STATES; ++i) {
- si_pm4_free_state(sctx, sctx->queued.array[i], i);
+ struct pipe_screen *screen = sctx->b.screen;
+ unsigned aligned_ndw = align(state->ndw, 8);
+
+ /* only supported on GFX7 and later */
+ if (sctx->chip_class < GFX7)
+ return;
+
+ assert(state->ndw);
+ assert(aligned_ndw <= SI_PM4_MAX_DW);
+
+ si_resource_reference(&state->indirect_buffer, NULL);
+ /* TODO: this hangs with 1024 or higher alignment on GFX9. */
+ state->indirect_buffer =
+ si_aligned_buffer_create(screen, 0,
+ PIPE_USAGE_DEFAULT, aligned_ndw * 4,
+ 256);
+ if (!state->indirect_buffer)
+ return;
+
+ /* Pad the IB to 8 DWs to meet CP fetch alignment requirements. */
+ if (sctx->screen->info.gfx_ib_pad_with_type2) {
+ for (int i = state->ndw; i < aligned_ndw; i++)
+ state->pm4[i] = 0x80000000; /* type2 nop packet */
+ } else {
+ for (int i = state->ndw; i < aligned_ndw; i++)
+ state->pm4[i] = 0xffff1000; /* type3 nop packet */