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nir: add a strip parameter to nir_serialize
[mesa.git]
/
src
/
gallium
/
drivers
/
radeonsi
/
si_shader_nir.c
diff --git
a/src/gallium/drivers/radeonsi/si_shader_nir.c
b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 3bf30c724363b29a75b6c760e071d95cd00005ea..e97e5ccb07b2653806ee8c9c103fe9f6c75814e5 100644
(file)
--- a/
src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/
src/gallium/drivers/radeonsi/si_shader_nir.c
@@
-783,6
+783,7
@@
void si_nir_scan_shader(const struct nir_shader *nir,
if (nir->num_uniforms > 0)
info->const_buffers_declared |= 1;
info->images_declared = u_bit_consecutive(0, nir->info.num_images);
if (nir->num_uniforms > 0)
info->const_buffers_declared |= 1;
info->images_declared = u_bit_consecutive(0, nir->info.num_images);
+ info->msaa_images_declared = u_bit_consecutive(0, nir->info.last_msaa_image + 1);
info->samplers_declared = nir->info.textures_used;
info->num_written_clipdistance = nir->info.clip_distance_array_size;
info->samplers_declared = nir->info.textures_used;
info->num_written_clipdistance = nir->info.clip_distance_array_size;
@@
-1003,11
+1004,6
@@
void si_lower_nir(struct si_shader_selector *sel)
si_nir_opts(sel->nir);
NIR_PASS_V(sel->nir, nir_lower_bool_to_int32);
si_nir_opts(sel->nir);
NIR_PASS_V(sel->nir, nir_lower_bool_to_int32);
-
- /* Strip the resulting shader so that the shader cache is more likely
- * to hit from other similar shaders.
- */
- nir_strip(sel->nir);
}
static void declare_nir_input_vs(struct si_shader_context *ctx,
}
static void declare_nir_input_vs(struct si_shader_context *ctx,
@@
-1062,7
+1058,7
@@
si_nir_load_sampler_desc(struct ac_shader_abi *abi,
unsigned const_index = base_index + constant_index;
assert(!descriptor_set);
unsigned const_index = base_index + constant_index;
assert(!descriptor_set);
- assert(
!image || desc_type == AC_DESC_IMAGE || desc_type =
= AC_DESC_BUFFER);
+ assert(
desc_type <
= AC_DESC_BUFFER);
if (bindless) {
LLVMValueRef list =
if (bindless) {
LLVMValueRef list =
@@
-1070,11
+1066,14
@@
si_nir_load_sampler_desc(struct ac_shader_abi *abi,
/* dynamic_index is the bindless handle */
if (image) {
/* dynamic_index is the bindless handle */
if (image) {
- /* For simplicity, bindless image descriptors use fixed
- * 16-dword slots for now.
- */
+ /* Bindless image descriptors use 16-dword slots. */
dynamic_index = LLVMBuildMul(ctx->ac.builder, dynamic_index,
LLVMConstInt(ctx->i64, 2, 0), "");
dynamic_index = LLVMBuildMul(ctx->ac.builder, dynamic_index,
LLVMConstInt(ctx->i64, 2, 0), "");
+ /* FMASK is right after the image. */
+ if (desc_type == AC_DESC_FMASK) {
+ dynamic_index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
+ ctx->i32_1, "");
+ }
return si_load_image_desc(ctx, list, dynamic_index, desc_type,
write, true);
return si_load_image_desc(ctx, list, dynamic_index, desc_type,
write, true);
@@
-1113,14
+1112,19
@@
si_nir_load_sampler_desc(struct ac_shader_abi *abi,
}
if (image) {
}
if (image) {
+ /* FMASKs are separate from images. */
+ if (desc_type == AC_DESC_FMASK) {
+ index = LLVMBuildAdd(ctx->ac.builder, index,
+ LLVMConstInt(ctx->i32, SI_NUM_IMAGES, 0), "");
+ }
index = LLVMBuildSub(ctx->ac.builder,
index = LLVMBuildSub(ctx->ac.builder,
- LLVMConstInt(ctx->i32, SI_NUM_IMAGES - 1, 0),
+ LLVMConstInt(ctx->i32, SI_NUM_IMAGE
_SLOT
S - 1, 0),
index, "");
return si_load_image_desc(ctx, list, index, desc_type, write, false);
}
index = LLVMBuildAdd(ctx->ac.builder, index,
index, "");
return si_load_image_desc(ctx, list, index, desc_type, write, false);
}
index = LLVMBuildAdd(ctx->ac.builder, index,
- LLVMConstInt(ctx->i32, SI_NUM_IMAGES / 2, 0), "");
+ LLVMConstInt(ctx->i32, SI_NUM_IMAGE
_SLOT
S / 2, 0), "");
return si_load_sampler_desc(ctx, list, index, desc_type);
}
return si_load_sampler_desc(ctx, list, index, desc_type);
}