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radeonsi: use a compiler queue with a low priority for optimized shaders
[mesa.git]
/
src
/
gallium
/
drivers
/
vc4
/
Makefile.sources
diff --git
a/src/gallium/drivers/vc4/Makefile.sources
b/src/gallium/drivers/vc4/Makefile.sources
index 76e46f54089c3f3929f43d191a1d2c853a7d2b01..442d7a5617826c553c95a35ec8c015ac47a09380 100644
(file)
--- a/
src/gallium/drivers/vc4/Makefile.sources
+++ b/
src/gallium/drivers/vc4/Makefile.sources
@@
-14,7
+14,6
@@
C_SOURCES := \
vc4_context.c \
vc4_context.h \
vc4_draw.c \
vc4_context.c \
vc4_context.h \
vc4_draw.c \
- vc4_drm.h \
vc4_emit.c \
vc4_fence.c \
vc4_formats.c \
vc4_emit.c \
vc4_fence.c \
vc4_formats.c \
@@
-29,8
+28,10
@@
C_SOURCES := \
vc4_opt_peephole_sf.c \
vc4_opt_small_immediates.c \
vc4_opt_vpm.c \
vc4_opt_peephole_sf.c \
vc4_opt_small_immediates.c \
vc4_opt_vpm.c \
+ vc4_opt_coalesce_ff_writes.c \
vc4_program.c \
vc4_qir.c \
vc4_program.c \
vc4_qir.c \
+ vc4_qir_emit_uniform_stream_resets.c \
vc4_qir_live_variables.c \
vc4_qir_lower_uniforms.c \
vc4_qir_schedule.c \
vc4_qir_live_variables.c \
vc4_qir_lower_uniforms.c \
vc4_qir_schedule.c \
@@
-54,6
+55,8
@@
C_SOURCES := \
vc4_simulator_validate.h \
vc4_state.c \
vc4_tiling.c \
vc4_simulator_validate.h \
vc4_state.c \
vc4_tiling.c \
+ vc4_tiling_lt.c \
+ vc4_tiling_lt_neon.c \
vc4_tiling.h \
vc4_uniforms.c \
$()
vc4_tiling.h \
vc4_uniforms.c \
$()