+ return false;
+ }
+
+ switch (ws->info.family) {
+ default:
+ case CHIP_UNKNOWN:
+ fprintf(stderr, "radeon: Unknown family.\n");
+ return false;
+ case CHIP_R300:
+ case CHIP_R350:
+ case CHIP_RV350:
+ case CHIP_RV370:
+ case CHIP_RV380:
+ case CHIP_RS400:
+ case CHIP_RC410:
+ case CHIP_RS480:
+ ws->info.chip_class = R300;
+ break;
+ case CHIP_R420: /* R4xx-based cores. */
+ case CHIP_R423:
+ case CHIP_R430:
+ case CHIP_R480:
+ case CHIP_R481:
+ case CHIP_RV410:
+ case CHIP_RS600:
+ case CHIP_RS690:
+ case CHIP_RS740:
+ ws->info.chip_class = R400;
+ break;
+ case CHIP_RV515: /* R5xx-based cores. */
+ case CHIP_R520:
+ case CHIP_RV530:
+ case CHIP_R580:
+ case CHIP_RV560:
+ case CHIP_RV570:
+ ws->info.chip_class = R500;
+ break;
+ case CHIP_R600:
+ case CHIP_RV610:
+ case CHIP_RV630:
+ case CHIP_RV670:
+ case CHIP_RV620:
+ case CHIP_RV635:
+ case CHIP_RS780:
+ case CHIP_RS880:
+ ws->info.chip_class = R600;
+ break;
+ case CHIP_RV770:
+ case CHIP_RV730:
+ case CHIP_RV710:
+ case CHIP_RV740:
+ ws->info.chip_class = R700;
+ break;
+ case CHIP_CEDAR:
+ case CHIP_REDWOOD:
+ case CHIP_JUNIPER:
+ case CHIP_CYPRESS:
+ case CHIP_HEMLOCK:
+ case CHIP_PALM:
+ case CHIP_SUMO:
+ case CHIP_SUMO2:
+ case CHIP_BARTS:
+ case CHIP_TURKS:
+ case CHIP_CAICOS:
+ ws->info.chip_class = EVERGREEN;
+ break;
+ case CHIP_CAYMAN:
+ case CHIP_ARUBA:
+ ws->info.chip_class = CAYMAN;
+ break;
+ case CHIP_TAHITI:
+ case CHIP_PITCAIRN:
+ case CHIP_VERDE:
+ case CHIP_OLAND:
+ case CHIP_HAINAN:
+ ws->info.chip_class = SI;
+ break;
+ case CHIP_BONAIRE:
+ case CHIP_KAVERI:
+ case CHIP_KABINI:
+ case CHIP_HAWAII:
+ case CHIP_MULLINS:
+ ws->info.chip_class = CIK;
+ break;
+ }
+
+ /* Set which chips don't have dedicated VRAM. */
+ switch (ws->info.family) {
+ case CHIP_RS400:
+ case CHIP_RC410:
+ case CHIP_RS480:
+ case CHIP_RS600:
+ case CHIP_RS690:
+ case CHIP_RS740:
+ case CHIP_RS780:
+ case CHIP_RS880:
+ case CHIP_PALM:
+ case CHIP_SUMO:
+ case CHIP_SUMO2:
+ case CHIP_ARUBA:
+ case CHIP_KAVERI:
+ case CHIP_KABINI:
+ case CHIP_MULLINS:
+ ws->info.has_dedicated_vram = false;
+ break;
+
+ default:
+ ws->info.has_dedicated_vram = true;
+ }
+
+ /* Check for dma */
+ ws->info.num_sdma_rings = 0;
+ /* DMA is disabled on R700. There is IB corruption and hangs. */
+ if (ws->info.chip_class >= EVERGREEN && ws->info.drm_minor >= 27) {
+ ws->info.num_sdma_rings = 1;
+ }
+
+ /* Check for UVD and VCE */
+ ws->info.has_hw_decode = false;
+ ws->info.vce_fw_version = 0x00000000;
+ if (ws->info.drm_minor >= 32) {
+ uint32_t value = RADEON_CS_RING_UVD;
+ if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,
+ "UVD Ring working", &value))
+ ws->info.has_hw_decode = value;
+
+ value = RADEON_CS_RING_VCE;
+ if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,
+ NULL, &value) && value) {
+
+ if (radeon_get_drm_value(ws->fd, RADEON_INFO_VCE_FW_VERSION,
+ "VCE FW version", &value))
+ ws->info.vce_fw_version = value;
+ }
+ }
+
+ /* Check for userptr support. */
+ {
+ struct drm_radeon_gem_userptr args = {0};
+
+ /* If the ioctl doesn't exist, -EINVAL is returned.
+ *
+ * If the ioctl exists, it should return -EACCES
+ * if RADEON_GEM_USERPTR_READONLY or RADEON_GEM_USERPTR_REGISTER
+ * aren't set.
+ */
+ ws->info.has_userptr =
+ drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_USERPTR,
+ &args, sizeof(args)) == -EACCES;