projects
/
mesa.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
anv: add new gem/drm helpers
[mesa.git]
/
src
/
intel
/
compiler
/
brw_vec4.h
diff --git
a/src/intel/compiler/brw_vec4.h
b/src/intel/compiler/brw_vec4.h
index ab2ecc47f5809f56fed2ccfb7f938c36c517cb8e..73c18b6748c04b2d88f3928ca8d280c3f9f662f2 100644
(file)
--- a/
src/intel/compiler/brw_vec4.h
+++ b/
src/intel/compiler/brw_vec4.h
@@
-28,7
+28,9
@@
#ifdef __cplusplus
#include "brw_ir_vec4.h"
#ifdef __cplusplus
#include "brw_ir_vec4.h"
+#include "brw_ir_performance.h"
#include "brw_vec4_builder.h"
#include "brw_vec4_builder.h"
+#include "brw_vec4_live_variables.h"
#endif
#include "compiler/glsl/ir.h"
#endif
#include "compiler/glsl/ir.h"
@@
-45,15
+47,14
@@
brw_vec4_generate_assembly(const struct brw_compiler *compiler,
void *mem_ctx,
const nir_shader *nir,
struct brw_vue_prog_data *prog_data,
void *mem_ctx,
const nir_shader *nir,
struct brw_vue_prog_data *prog_data,
- const struct cfg_t *cfg);
+ const struct cfg_t *cfg,
+ const brw::performance &perf,
+ struct brw_compile_stats *stats);
#ifdef __cplusplus
} /* extern "C" */
namespace brw {
#ifdef __cplusplus
} /* extern "C" */
namespace brw {
-
-class vec4_live_variables;
-
/**
* The vertex shader front-end.
*
/**
* The vertex shader front-end.
*
@@
-106,9
+107,10
@@
public:
int first_non_payload_grf;
unsigned int max_grf;
int first_non_payload_grf;
unsigned int max_grf;
- int *virtual_grf_start;
- int *virtual_grf_end;
- brw::vec4_live_variables *live_intervals;
+ BRW_ANALYSIS(live_analysis, brw::vec4_live_variables,
+ backend_shader *) live_analysis;
+ BRW_ANALYSIS(performance_analysis, brw::performance,
+ vec4_visitor *) performance_analysis;
bool need_all_constants_in_pull_buffer;
bool need_all_constants_in_pull_buffer;
@@
-137,18
+139,14
@@
public:
void move_push_constants_to_pull_constants();
void split_uniform_registers();
void pack_uniform_registers();
void move_push_constants_to_pull_constants();
void split_uniform_registers();
void pack_uniform_registers();
- void calculate_live_intervals();
- void invalidate_live_intervals();
+ virtual void invalidate_analysis(brw::analysis_dependency_class c);
void split_virtual_grfs();
bool opt_vector_float();
bool opt_reduce_swizzle();
bool dead_code_eliminate();
void split_virtual_grfs();
bool opt_vector_float();
bool opt_reduce_swizzle();
bool dead_code_eliminate();
- int var_range_start(unsigned v, unsigned n) const;
- int var_range_end(unsigned v, unsigned n) const;
- bool virtual_grf_interferes(int a, int b);
bool opt_cmod_propagation();
bool opt_copy_propagation(bool do_constant_prop = true);
bool opt_cmod_propagation();
bool opt_copy_propagation(bool do_constant_prop = true);
- bool opt_cse_local(bblock_t *block);
+ bool opt_cse_local(bblock_t *block
, const vec4_live_variables &live
);
bool opt_cse();
bool opt_algebraic();
bool opt_register_coalesce();
bool opt_cse();
bool opt_algebraic();
bool opt_register_coalesce();
@@
-230,8
+228,6
@@
public:
#undef EMIT2
#undef EMIT3
#undef EMIT2
#undef EMIT3
- int implied_mrf_writes(vec4_instruction *inst);
-
vec4_instruction *emit_minmax(enum brw_conditional_mod conditionalmod, dst_reg dst,
src_reg src0, src_reg src1);
vec4_instruction *emit_minmax(enum brw_conditional_mod conditionalmod, dst_reg dst,
src_reg src0, src_reg src1);
@@
-313,15
+309,15
@@
public:
src_reg get_timestamp();
src_reg get_timestamp();
- void dump_instruction(
backend_instruction *inst)
;
- void dump_instruction(
backend_instruction *inst, FILE *file)
;
+ void dump_instruction(
const backend_instruction *inst) const
;
+ void dump_instruction(
const backend_instruction *inst, FILE *file) const
;
bool is_high_sampler(src_reg sampler);
bool optimize_predicate(nir_alu_instr *instr, enum brw_predicate *predicate);
bool is_high_sampler(src_reg sampler);
bool optimize_predicate(nir_alu_instr *instr, enum brw_predicate *predicate);
- void emit_conversion_from_double(dst_reg dst, src_reg src
, bool saturate
);
- void emit_conversion_to_double(dst_reg dst, src_reg src
, bool saturate
);
+ void emit_conversion_from_double(dst_reg dst, src_reg src);
+ void emit_conversion_to_double(dst_reg dst, src_reg src);
vec4_instruction *shuffle_64bit_data(dst_reg dst, src_reg src,
bool for_write,
vec4_instruction *shuffle_64bit_data(dst_reg dst, src_reg src,
bool for_write,