- }
-
- /**
- * Emit a typed surface read opcode. \p dims determines the number of
- * components of the address and \p size the number of components of the
- * returned value.
- */
- src_reg
- emit_typed_read(const vec4_builder &bld, const src_reg &surface,
- const src_reg &addr, unsigned dims, unsigned size)
- {
- const bool has_simd4x2 = (bld.shader->devinfo->gen >= 8 ||
- bld.shader->devinfo->is_haswell);
- const src_reg tmp =
- emit_send(bld, SHADER_OPCODE_TYPED_SURFACE_READ,
- emit_typed_message_header(bld),
- emit_insert(bld, addr, dims, has_simd4x2),
- has_simd4x2 ? 1 : dims,
- src_reg(), 0,
- surface, size,
- has_simd4x2 ? 1 : size);
-
- return emit_extract(bld, tmp, size, has_simd4x2);
- }
-
- /**
- * Emit a typed surface write opcode. \p dims determines the number of
- * components of the address and \p size the number of components of the
- * argument.
- */
- void
- emit_typed_write(const vec4_builder &bld, const src_reg &surface,
- const src_reg &addr, const src_reg &src,
- unsigned dims, unsigned size)
- {
- const bool has_simd4x2 = (bld.shader->devinfo->gen >= 8 ||
- bld.shader->devinfo->is_haswell);
- emit_send(bld, SHADER_OPCODE_TYPED_SURFACE_WRITE,
- emit_typed_message_header(bld),
- emit_insert(bld, addr, dims, has_simd4x2),
- has_simd4x2 ? 1 : dims,
- emit_insert(bld, src, size, has_simd4x2),
- has_simd4x2 ? 1 : size,
- surface, size, 0);
- }
-
- /**
- * Emit a typed surface atomic opcode. \p dims determines the number of
- * components of the address and \p rsize the number of components of
- * the returned value (either zero or one).
- */
- src_reg
- emit_typed_atomic(const vec4_builder &bld,
- const src_reg &surface, const src_reg &addr,
- const src_reg &src0, const src_reg &src1,
- unsigned dims, unsigned rsize, unsigned op,
- brw_predicate pred)
- {
- const bool has_simd4x2 = (bld.shader->devinfo->gen >= 8 ||
- bld.shader->devinfo->is_haswell);