+};
+
+#define GEN12_URB_MIN_MAX_ENTRIES \
+ .min_entries = { \
+ [MESA_SHADER_VERTEX] = 64, \
+ [MESA_SHADER_TESS_EVAL] = 34, \
+ }, \
+ .max_entries = { \
+ [MESA_SHADER_VERTEX] = 3576, \
+ [MESA_SHADER_TESS_CTRL] = 1548, \
+ [MESA_SHADER_TESS_EVAL] = 3576, \
+ [MESA_SHADER_GEOMETRY] = 1548, \
+ }
+
+#define GEN12_HW_INFO \
+ .gen = 12, \
+ .has_pln = false, \
+ .has_sample_with_hiz = false, \
+ .has_aux_map = true, \
+ .max_vs_threads = 546, \
+ .max_gs_threads = 336, \
+ .max_tcs_threads = 336, \
+ .max_tes_threads = 546, \
+ .max_cs_threads = 112, /* threads per DSS */ \
+ .urb = { \
+ GEN12_URB_MIN_MAX_ENTRIES, \
+ }
+
+#define GEN12_FEATURES(_gt, _slices, _l3) \
+ GEN8_FEATURES, \
+ GEN12_HW_INFO, \
+ .has_64bit_float = false, \
+ .has_64bit_int = false, \
+ .has_integer_dword_mul = false, \
+ .gt = _gt, .num_slices = _slices, .l3_banks = _l3, \
+ .simulator_id = 22, \
+ .num_eu_per_subslice = 16
+
+#define dual_subslices(args...) { args, }
+
+#define GEN12_GT05_FEATURES \
+ GEN12_FEATURES(1, 1, 4), \
+ .num_subslices = dual_subslices(1)
+
+#define GEN12_GT_FEATURES(_gt) \
+ GEN12_FEATURES(_gt, 1, _gt == 1 ? 4 : 8), \
+ .num_subslices = dual_subslices(_gt == 1 ? 2 : 6)
+
+static const struct gen_device_info gen_device_info_tgl_gt1 = {
+ GEN12_GT_FEATURES(1),
+};
+
+static const struct gen_device_info gen_device_info_tgl_gt2 = {
+ GEN12_GT_FEATURES(2),
+};
+
+static const struct gen_device_info gen_device_info_rkl_gt05 = {
+ GEN12_GT05_FEATURES,
+};
+
+static const struct gen_device_info gen_device_info_rkl_gt1 = {
+ GEN12_GT_FEATURES(1),
+};
+
+#define GEN12_DG1_FEATURES \
+ GEN12_GT_FEATURES(2), \
+ .is_dg1 = true, \
+ .has_llc = false, \
+ .urb.size = 768, \
+ .simulator_id = 30
+
+UNUSED static const struct gen_device_info gen_device_info_dg1 = {
+ GEN12_DG1_FEATURES,