+ s.SurfaceQPitch = get_qpitch(info->surf) >> 2;
+#elif GEN_GEN == 7
+ s.SurfaceArraySpacing = info->surf->array_pitch_span ==
+ ISL_ARRAY_PITCH_SPAN_COMPACT;
+#endif
+
+#if GEN_GEN >= 8
+ assert(GEN_GEN < 12 || info->surf->tiling != ISL_TILING_W);
+ s.TileMode = isl_to_gen_tiling[info->surf->tiling];
+#else
+ s.TiledSurface = info->surf->tiling != ISL_TILING_LINEAR,
+ s.TileWalk = info->surf->tiling == ISL_TILING_Y0 ? TILEWALK_YMAJOR :
+ TILEWALK_XMAJOR,
+#endif
+
+#if GEN_GEN >= 8
+ s.RenderCacheReadWriteMode = WriteOnlyCache;
+#else
+ s.RenderCacheReadWriteMode = 0;
+#endif
+
+#if GEN_GEN >= 11
+ /* We've seen dEQP failures when enabling this bit with UINT formats,
+ * which particularly affects blorp_copy() operations. It shouldn't
+ * have any effect on UINT textures anyway, so disable it for them.
+ */
+ s.EnableUnormPathInColorPipe =
+ !isl_format_has_int_channel(info->view->format);
+#endif
+
+ s.CubeFaceEnablePositiveZ = 1;
+ s.CubeFaceEnableNegativeZ = 1;
+ s.CubeFaceEnablePositiveY = 1;
+ s.CubeFaceEnableNegativeY = 1;
+ s.CubeFaceEnablePositiveX = 1;
+ s.CubeFaceEnableNegativeX = 1;
+
+#if GEN_GEN >= 6
+ s.NumberofMultisamples = ffs(info->surf->samples) - 1;
+#if GEN_GEN >= 7
+ s.MultisampledSurfaceStorageFormat =
+ isl_to_gen_multisample_layout[info->surf->msaa_layout];
+#endif
+#endif
+
+#if (GEN_GEN >= 8 || GEN_IS_HASWELL)
+ if (info->view->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT)
+ assert(isl_swizzle_supports_rendering(dev->info, info->view->swizzle));
+
+ s.ShaderChannelSelectRed = (enum GENX(ShaderChannelSelect)) info->view->swizzle.r;
+ s.ShaderChannelSelectGreen = (enum GENX(ShaderChannelSelect)) info->view->swizzle.g;
+ s.ShaderChannelSelectBlue = (enum GENX(ShaderChannelSelect)) info->view->swizzle.b;
+ s.ShaderChannelSelectAlpha = (enum GENX(ShaderChannelSelect)) info->view->swizzle.a;
+#else
+ assert(isl_swizzle_is_identity(info->view->swizzle));
+#endif
+
+ s.SurfaceBaseAddress = info->address;
+
+#if GEN_GEN >= 6
+ s.MOCS = info->mocs;
+#endif
+
+#if GEN_GEN > 4 || GEN_IS_G4X
+ if (info->x_offset_sa != 0 || info->y_offset_sa != 0) {
+ /* There are fairly strict rules about when the offsets can be used.
+ * These are mostly taken from the Sky Lake PRM documentation for
+ * RENDER_SURFACE_STATE.
+ */
+ assert(info->surf->tiling != ISL_TILING_LINEAR);
+ assert(info->surf->dim == ISL_SURF_DIM_2D);
+ assert(isl_is_pow2(isl_format_get_layout(info->view->format)->bpb));
+ assert(info->surf->levels == 1);
+ assert(info->surf->logical_level0_px.array_len == 1);
+ assert(info->aux_usage == ISL_AUX_USAGE_NONE);
+
+ if (GEN_GEN >= 8) {
+ /* Broadwell added more rules. */
+ assert(info->surf->samples == 1);
+ if (isl_format_get_layout(info->view->format)->bpb == 8)
+ assert(info->x_offset_sa % 16 == 0);
+ if (isl_format_get_layout(info->view->format)->bpb == 16)
+ assert(info->x_offset_sa % 8 == 0);
+ }
+
+#if GEN_GEN >= 7
+ s.SurfaceArray = false;
+#endif
+ }
+
+ const unsigned x_div = 4;
+ const unsigned y_div = GEN_GEN >= 8 ? 4 : 2;
+ assert(info->x_offset_sa % x_div == 0);
+ assert(info->y_offset_sa % y_div == 0);
+ s.XOffset = info->x_offset_sa / x_div;
+ s.YOffset = info->y_offset_sa / y_div;
+#else
+ assert(info->x_offset_sa == 0);
+ assert(info->y_offset_sa == 0);
+#endif
+
+#if GEN_GEN >= 7
+ if (info->aux_usage != ISL_AUX_USAGE_NONE) {
+ /* Check valid aux usages per-gen */
+ if (GEN_GEN >= 12) {
+ assert(info->aux_usage == ISL_AUX_USAGE_MCS ||
+ info->aux_usage == ISL_AUX_USAGE_CCS_E ||
+ info->aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT ||
+ info->aux_usage == ISL_AUX_USAGE_MCS_CCS ||
+ info->aux_usage == ISL_AUX_USAGE_STC_CCS);
+ } else if (GEN_GEN >= 9) {
+ assert(info->aux_usage == ISL_AUX_USAGE_HIZ ||
+ info->aux_usage == ISL_AUX_USAGE_MCS ||
+ info->aux_usage == ISL_AUX_USAGE_CCS_D ||
+ info->aux_usage == ISL_AUX_USAGE_CCS_E);
+ } else if (GEN_GEN >= 8) {
+ assert(info->aux_usage == ISL_AUX_USAGE_HIZ ||
+ info->aux_usage == ISL_AUX_USAGE_MCS ||
+ info->aux_usage == ISL_AUX_USAGE_CCS_D);
+ } else if (GEN_GEN >= 7) {
+ assert(info->aux_usage == ISL_AUX_USAGE_MCS ||
+ info->aux_usage == ISL_AUX_USAGE_CCS_D);
+ }
+
+ /* The docs don't appear to say anything whatsoever about compression
+ * and the data port. Testing seems to indicate that the data port
+ * completely ignores the AuxiliarySurfaceMode field.
+ */
+ assert(!(info->view->usage & ISL_SURF_USAGE_STORAGE_BIT));
+
+ if (isl_surf_usage_is_depth(info->surf->usage))
+ assert(isl_aux_usage_has_hiz(info->aux_usage));
+
+ if (isl_surf_usage_is_stencil(info->surf->usage))
+ assert(info->aux_usage == ISL_AUX_USAGE_STC_CCS);
+
+ if (isl_aux_usage_has_hiz(info->aux_usage)) {
+ /* For Gen8-10, there are some restrictions around sampling from HiZ.
+ * The Skylake PRM docs for RENDER_SURFACE_STATE::AuxiliarySurfaceMode
+ * say:
+ *
+ * "If this field is set to AUX_HIZ, Number of Multisamples must
+ * be MULTISAMPLECOUNT_1, and Surface Type cannot be SURFTYPE_3D."
+ *
+ * On Gen12, the docs are a bit less obvious but the restriction is
+ * the same. The limitation isn't called out explicitly but the docs
+ * for the CCS_E value of RENDER_SURFACE_STATE::AuxiliarySurfaceMode
+ * say:
+ *
+ * "If Number of multisamples > 1, programming this value means
+ * MSAA compression is enabled for that surface. Auxillary surface
+ * is MSC with tile y."
+ *
+ * Since this interpretation ignores whether the surface is
+ * depth/stencil or not and since multisampled depth buffers use
+ * ISL_MSAA_LAYOUT_INTERLEAVED which is incompatible with MCS
+ * compression, this means that we can't even specify MSAA depth CCS
+ * in RENDER_SURFACE_STATE::AuxiliarySurfaceMode.
+ */
+ assert(info->surf->samples == 1);
+
+ /* The dimension must not be 3D */
+ assert(info->surf->dim != ISL_SURF_DIM_3D);
+
+ /* The format must be one of the following: */
+ switch (info->view->format) {
+ case ISL_FORMAT_R32_FLOAT:
+ case ISL_FORMAT_R24_UNORM_X8_TYPELESS:
+ case ISL_FORMAT_R16_UNORM:
+ break;
+ default:
+ assert(!"Incompatible HiZ Sampling format");
+ break;
+ }
+ }
+
+#if GEN_GEN >= 8
+ s.AuxiliarySurfaceMode = isl_to_gen_aux_mode[info->aux_usage];
+#else
+ s.MCSEnable = true;
+#endif
+ }
+
+ /* The auxiliary buffer info is filled when it's useable by the HW.
+ *
+ * Starting with Gen12, the only form of compression that can be used
+ * with RENDER_SURFACE_STATE which requires an aux surface is MCS.
+ * HiZ still requires a surface but the HiZ surface can only be
+ * accessed through 3DSTATE_HIER_DEPTH_BUFFER.
+ *
+ * On all earlier hardware, an aux surface is required for all forms
+ * of compression.
+ */
+ if ((GEN_GEN < 12 && info->aux_usage != ISL_AUX_USAGE_NONE) ||
+ (GEN_GEN >= 12 && isl_aux_usage_has_mcs(info->aux_usage))) {
+
+ assert(info->aux_surf != NULL);
+
+ struct isl_tile_info tile_info;
+ isl_surf_get_tile_info(info->aux_surf, &tile_info);
+ uint32_t pitch_in_tiles =
+ info->aux_surf->row_pitch_B / tile_info.phys_extent_B.width;
+
+ s.AuxiliarySurfaceBaseAddress = info->aux_address;
+ s.AuxiliarySurfacePitch = pitch_in_tiles - 1;
+
+#if GEN_GEN >= 8
+ /* Auxiliary surfaces in ISL have compressed formats but the hardware
+ * doesn't expect our definition of the compression, it expects qpitch
+ * in units of samples on the main surface.
+ */
+ s.AuxiliarySurfaceQPitch =
+ isl_surf_get_array_pitch_sa_rows(info->aux_surf) >> 2;
+#endif
+ }
+#endif
+
+#if GEN_GEN >= 8 && GEN_GEN < 11