+static nir_ssa_def *
+build_nir_w_tiled_fetch(struct nir_builder *b, struct anv_device *device,
+ nir_ssa_def *tex_pos, nir_ssa_def *tex_pitch)
+{
+ nir_ssa_def *x = nir_channel(b, tex_pos, 0);
+ nir_ssa_def *y = nir_channel(b, tex_pos, 1);
+
+ /* First, compute the block-aligned offset */
+ nir_ssa_def *x_major = nir_ushr(b, x, nir_imm_int(b, 6));
+ nir_ssa_def *y_major = nir_ushr(b, y, nir_imm_int(b, 6));
+ nir_ssa_def *offset =
+ nir_iadd(b, nir_imul(b, y_major,
+ nir_imul(b, tex_pitch, nir_imm_int(b, 64))),
+ nir_imul(b, x_major, nir_imm_int(b, 4096)));
+
+ /* Compute the bottom 12 bits of the offset */
+ offset = nir_copy_bits(b, offset, 0, x, 0, 1);
+ offset = nir_copy_bits(b, offset, 1, y, 0, 1);
+ offset = nir_copy_bits(b, offset, 2, x, 1, 1);
+ offset = nir_copy_bits(b, offset, 3, y, 1, 1);
+ offset = nir_copy_bits(b, offset, 4, x, 2, 1);
+ offset = nir_copy_bits(b, offset, 5, y, 2, 4);
+ offset = nir_copy_bits(b, offset, 9, x, 3, 3);
+
+ if (device->isl_dev.has_bit6_swizzling) {
+ offset = nir_ixor(b, offset,
+ nir_ushr(b, nir_iand(b, offset, nir_imm_int(b, 0x0200)),
+ nir_imm_int(b, 3)));
+ }
+
+ const struct glsl_type *sampler_type =
+ glsl_sampler_type(GLSL_SAMPLER_DIM_BUF, false, false, GLSL_TYPE_FLOAT);
+ nir_variable *sampler = nir_variable_create(b->shader, nir_var_uniform,
+ sampler_type, "s_tex");
+ sampler->data.descriptor_set = 0;
+ sampler->data.binding = 0;
+
+ nir_tex_instr *tex = nir_tex_instr_create(b->shader, 1);
+ tex->sampler_dim = GLSL_SAMPLER_DIM_BUF;
+ tex->op = nir_texop_txf;
+ tex->src[0].src_type = nir_tex_src_coord;
+ tex->src[0].src = nir_src_for_ssa(offset);
+ tex->dest_type = nir_type_float; /* TODO */
+ tex->is_array = false;
+ tex->coord_components = 1;
+ tex->texture = nir_deref_var_create(tex, sampler);
+ tex->sampler = NULL;
+
+ nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
+ nir_builder_instr_insert(b, &tex->instr);
+
+ return &tex->dest.ssa;
+}
+
+static nir_ssa_def *
+build_nir_texel_fetch(struct nir_builder *b, struct anv_device *device,
+ nir_ssa_def *tex_pos, nir_ssa_def *tex_pitch)
+{
+ const struct glsl_type *sampler_type =
+ glsl_sampler_type(GLSL_SAMPLER_DIM_2D, false, false, GLSL_TYPE_FLOAT);
+ nir_variable *sampler = nir_variable_create(b->shader, nir_var_uniform,
+ sampler_type, "s_tex");
+ sampler->data.descriptor_set = 0;
+ sampler->data.binding = 0;
+
+ nir_tex_instr *tex = nir_tex_instr_create(b->shader, 2);
+ tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
+ tex->op = nir_texop_txf;
+ tex->src[0].src_type = nir_tex_src_coord;
+ tex->src[0].src = nir_src_for_ssa(tex_pos);
+ tex->src[1].src_type = nir_tex_src_lod;
+ tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0));
+ tex->dest_type = nir_type_float; /* TODO */
+ tex->is_array = false;
+ tex->coord_components = 2;
+ tex->texture = nir_deref_var_create(tex, sampler);
+ tex->sampler = NULL;
+
+ nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
+ nir_builder_instr_insert(b, &tex->instr);
+
+ return &tex->dest.ssa;
+}
+
+static const VkPipelineVertexInputStateCreateInfo normal_vi_create_info = {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
+ .vertexBindingDescriptionCount = 2,
+ .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
+ {
+ .binding = 0,
+ .stride = 0,
+ .inputRate = VK_VERTEX_INPUT_RATE_INSTANCE
+ },
+ {
+ .binding = 1,
+ .stride = 5 * sizeof(float),
+ .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
+ },
+ },
+ .vertexAttributeDescriptionCount = 3,
+ .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
+ {
+ /* VUE Header */
+ .location = 0,
+ .binding = 0,
+ .format = VK_FORMAT_R32G32B32A32_UINT,
+ .offset = 0
+ },
+ {
+ /* Position */
+ .location = 1,
+ .binding = 1,
+ .format = VK_FORMAT_R32G32_SFLOAT,
+ .offset = 0
+ },
+ {
+ /* Texture Coordinate */
+ .location = 2,
+ .binding = 1,
+ .format = VK_FORMAT_R32G32B32_SFLOAT,
+ .offset = 8
+ },
+ },
+};
+
+static nir_shader *
+build_nir_copy_fragment_shader(struct anv_device *device,
+ texel_fetch_build_func txf_func)
+{
+ const struct glsl_type *vec4 = glsl_vec4_type();
+ const struct glsl_type *vec3 = glsl_vector_type(GLSL_TYPE_FLOAT, 3);
+ nir_builder b;
+
+ nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
+ b.shader->info.name = ralloc_strdup(b.shader, "meta_blit2d_fs");
+
+ nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in,
+ vec3, "v_tex_pos");
+ tex_pos_in->data.location = VARYING_SLOT_VAR0;
+
+ nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out,
+ vec4, "f_color");
+ color_out->data.location = FRAG_RESULT_DATA0;
+
+ nir_ssa_def *pos_int = nir_f2i(&b, nir_load_var(&b, tex_pos_in));
+ unsigned swiz[4] = { 0, 1 };
+ nir_ssa_def *tex_pos = nir_swizzle(&b, pos_int, swiz, 2, false);
+ nir_ssa_def *tex_pitch = nir_channel(&b, pos_int, 2);
+
+ nir_ssa_def *color = txf_func(&b, device, tex_pos, tex_pitch);
+ nir_store_var(&b, color_out, color, 0xf);
+
+ return b.shader;
+}
+
+static const VkPipelineVertexInputStateCreateInfo w_tiled_vi_create_info = {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
+ .vertexBindingDescriptionCount = 2,
+ .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
+ {
+ .binding = 0,
+ .stride = 0,
+ .inputRate = VK_VERTEX_INPUT_RATE_INSTANCE
+ },
+ {
+ .binding = 1,
+ .stride = 2 * sizeof(float),
+ .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
+ },
+ },
+ .vertexAttributeDescriptionCount = 4,
+ .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
+ {
+ /* VUE Header */
+ .location = 0,
+ .binding = 0,
+ .format = VK_FORMAT_R32G32B32A32_UINT,
+ .offset = 0
+ },
+ {
+ /* Position */
+ .location = 1,
+ .binding = 1,
+ .format = VK_FORMAT_R32G32_SFLOAT,
+ .offset = 0
+ },
+ {
+ /* Texture Offset */
+ .location = 2,
+ .binding = 0,
+ .format = VK_FORMAT_R32G32B32_UINT,
+ .offset = 16
+ },
+ {
+ /* Destination bounds */
+ .location = 3,
+ .binding = 0,
+ .format = VK_FORMAT_R32G32B32A32_UINT,
+ .offset = 28
+ },
+ },
+};
+
+static nir_shader *
+build_nir_w_tiled_fragment_shader(struct anv_device *device,
+ texel_fetch_build_func txf_func)
+{
+ const struct glsl_type *vec4 = glsl_vec4_type();
+ const struct glsl_type *ivec3 = glsl_vector_type(GLSL_TYPE_INT, 3);
+ const struct glsl_type *uvec4 = glsl_vector_type(GLSL_TYPE_UINT, 4);
+ nir_builder b;
+
+ nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
+ b.shader->info.name = ralloc_strdup(b.shader, "meta_blit2d_fs");
+
+ /* We need gl_FragCoord so we know our Y-tiled position */
+ nir_variable *frag_coord_in = nir_variable_create(b.shader,
+ nir_var_shader_in,
+ vec4, "gl_FragCoord");
+ frag_coord_in->data.location = VARYING_SLOT_POS;
+ frag_coord_in->data.origin_upper_left = true;
+
+ /* In location 0 we have an ivec3 that has the offset from dest to
+ * source in the first two components and the stride in the third.
+ */
+ nir_variable *tex_off_in = nir_variable_create(b.shader, nir_var_shader_in,
+ ivec3, "v_tex_off");
+ tex_off_in->data.location = VARYING_SLOT_VAR0;
+ tex_off_in->data.interpolation = INTERP_QUALIFIER_FLAT;
+
+ /* In location 1 we have a uvec4 that gives us the bounds of the
+ * destination. We need to discard if we get outside this boundary.
+ */
+ nir_variable *bounds_in = nir_variable_create(b.shader, nir_var_shader_in,
+ uvec4, "v_bounds");
+ bounds_in->data.location = VARYING_SLOT_VAR1;
+ bounds_in->data.interpolation = INTERP_QUALIFIER_FLAT;
+
+ nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out,
+ vec4, "f_color");
+ color_out->data.location = FRAG_RESULT_DATA0;
+
+ nir_ssa_def *frag_coord_int = nir_f2i(&b, nir_load_var(&b, frag_coord_in));
+ nir_ssa_def *x_Y = nir_channel(&b, frag_coord_int, 0);
+ nir_ssa_def *y_Y = nir_channel(&b, frag_coord_int, 1);
+
+ /* Compute the W-tiled position from the Y-tiled position */
+ nir_ssa_def *x_W = nir_iand(&b, x_Y, nir_imm_int(&b, 0xffffff80));
+ x_W = nir_ushr(&b, x_W, nir_imm_int(&b, 1));
+ x_W = nir_copy_bits(&b, x_W, 0, x_Y, 0, 1);
+ x_W = nir_copy_bits(&b, x_W, 1, x_Y, 2, 1);
+ x_W = nir_copy_bits(&b, x_W, 2, y_Y, 0, 1);
+ x_W = nir_copy_bits(&b, x_W, 3, x_Y, 4, 3);
+
+ nir_ssa_def *y_W = nir_iand(&b, y_Y, nir_imm_int(&b, 0xffffffe0));
+ y_W = nir_ishl(&b, y_W, nir_imm_int(&b, 1));
+ y_W = nir_copy_bits(&b, y_W, 0, x_Y, 1, 1);
+ y_W = nir_copy_bits(&b, y_W, 1, x_Y, 3, 1);
+ y_W = nir_copy_bits(&b, y_W, 2, y_Y, 1, 4);
+
+ /* Figure out if we are out-of-bounds and discard */
+ nir_ssa_def *bounds = nir_load_var(&b, bounds_in);
+ nir_ssa_def *oob =
+ nir_ior(&b, nir_ult(&b, x_W, nir_channel(&b, bounds, 0)),
+ nir_ior(&b, nir_ult(&b, y_W, nir_channel(&b, bounds, 1)),
+ nir_ior(&b, nir_uge(&b, x_W, nir_channel(&b, bounds, 2)),
+ nir_uge(&b, y_W, nir_channel(&b, bounds, 3)))));
+
+ nir_intrinsic_instr *discard =
+ nir_intrinsic_instr_create(b.shader, nir_intrinsic_discard_if);
+ discard->src[0] = nir_src_for_ssa(oob);
+ nir_builder_instr_insert(&b, &discard->instr);
+
+ nir_ssa_def *tex_off = nir_channels(&b, nir_load_var(&b, tex_off_in), 0x3);
+ nir_ssa_def *tex_pos = nir_iadd(&b, nir_vec2(&b, x_W, y_W), tex_off);
+ nir_ssa_def *tex_pitch = nir_channel(&b, nir_load_var(&b, tex_off_in), 2);
+
+ nir_ssa_def *color = txf_func(&b, device, tex_pos, tex_pitch);
+ nir_store_var(&b, color_out, color, 0xf);
+
+ return b.shader;
+}
+
+void
+anv_device_finish_meta_blit2d_state(struct anv_device *device)
+{
+ if (device->meta_state.blit2d.render_pass) {
+ anv_DestroyRenderPass(anv_device_to_handle(device),
+ device->meta_state.blit2d.render_pass,
+ &device->meta_state.alloc);
+ }
+
+ if (device->meta_state.blit2d.img_p_layout) {
+ anv_DestroyPipelineLayout(anv_device_to_handle(device),
+ device->meta_state.blit2d.img_p_layout,
+ &device->meta_state.alloc);
+ }
+
+ if (device->meta_state.blit2d.img_ds_layout) {
+ anv_DestroyDescriptorSetLayout(anv_device_to_handle(device),
+ device->meta_state.blit2d.img_ds_layout,
+ &device->meta_state.alloc);
+ }
+
+ if (device->meta_state.blit2d.buf_p_layout) {
+ anv_DestroyPipelineLayout(anv_device_to_handle(device),
+ device->meta_state.blit2d.buf_p_layout,
+ &device->meta_state.alloc);
+ }
+
+ if (device->meta_state.blit2d.buf_ds_layout) {
+ anv_DestroyDescriptorSetLayout(anv_device_to_handle(device),
+ device->meta_state.blit2d.buf_ds_layout,
+ &device->meta_state.alloc);
+ }
+
+ for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) {
+ for (unsigned dst = 0; dst < BLIT2D_NUM_DST_TYPES; dst++) {
+ if (device->meta_state.blit2d.pipelines[src][dst]) {
+ anv_DestroyPipeline(anv_device_to_handle(device),
+ device->meta_state.blit2d.pipelines[src][dst],
+ &device->meta_state.alloc);
+ }
+ }
+ }
+}
+
+static VkResult
+blit2d_init_pipeline(struct anv_device *device,
+ enum blit2d_src_type src_type,
+ enum blit2d_dst_type dst_type)
+{
+ VkResult result;
+
+ texel_fetch_build_func src_func;
+ switch (src_type) {
+ case BLIT2D_SRC_TYPE_NORMAL:
+ src_func = build_nir_texel_fetch;
+ break;
+ case BLIT2D_SRC_TYPE_W_DETILE:
+ src_func = build_nir_w_tiled_fetch;
+ break;
+ default:
+ unreachable("Invalid blit2d source type");
+ }
+
+ const VkPipelineVertexInputStateCreateInfo *vi_create_info;
+ struct anv_shader_module fs = { .nir = NULL };
+ switch (dst_type) {
+ case BLIT2D_DST_TYPE_NORMAL:
+ fs.nir = build_nir_copy_fragment_shader(device, src_func);
+ vi_create_info = &normal_vi_create_info;
+ break;
+ case BLIT2D_DST_TYPE_W_TILE:
+ fs.nir = build_nir_w_tiled_fragment_shader(device, src_func);
+ vi_create_info = &w_tiled_vi_create_info;
+ break;
+ case BLIT2D_DST_TYPE_RGB:
+ /* Not yet supported */
+ default:
+ return VK_SUCCESS;
+ }
+
+ /* We don't use a vertex shader for blitting, but instead build and pass
+ * the VUEs directly to the rasterization backend. However, we do need
+ * to provide GLSL source for the vertex shader so that the compiler
+ * does not dead-code our inputs.
+ */
+ struct anv_shader_module vs = {
+ .nir = build_nir_vertex_shader(),
+ };
+
+ VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
+ {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
+ .stage = VK_SHADER_STAGE_VERTEX_BIT,
+ .module = anv_shader_module_to_handle(&vs),
+ .pName = "main",
+ .pSpecializationInfo = NULL
+ }, {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
+ .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
+ .module = anv_shader_module_to_handle(&fs),
+ .pName = "main",
+ .pSpecializationInfo = NULL
+ },
+ };
+
+ const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
+ .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
+ .stageCount = ARRAY_SIZE(pipeline_shader_stages),
+ .pStages = pipeline_shader_stages,
+ .pVertexInputState = vi_create_info,
+ .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
+ .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
+ .primitiveRestartEnable = false,
+ },
+ .pViewportState = &(VkPipelineViewportStateCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
+ .viewportCount = 1,
+ .scissorCount = 1,
+ },
+ .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
+ .rasterizerDiscardEnable = false,
+ .polygonMode = VK_POLYGON_MODE_FILL,
+ .cullMode = VK_CULL_MODE_NONE,
+ .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE
+ },
+ .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
+ .rasterizationSamples = 1,
+ .sampleShadingEnable = false,
+ .pSampleMask = (VkSampleMask[]) { UINT32_MAX },
+ },
+ .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
+ .attachmentCount = 1,
+ .pAttachments = (VkPipelineColorBlendAttachmentState []) {
+ { .colorWriteMask =
+ VK_COLOR_COMPONENT_A_BIT |
+ VK_COLOR_COMPONENT_R_BIT |
+ VK_COLOR_COMPONENT_G_BIT |
+ VK_COLOR_COMPONENT_B_BIT },
+ }
+ },
+ .pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
+ .dynamicStateCount = 9,
+ .pDynamicStates = (VkDynamicState[]) {
+ VK_DYNAMIC_STATE_VIEWPORT,
+ VK_DYNAMIC_STATE_SCISSOR,
+ VK_DYNAMIC_STATE_LINE_WIDTH,
+ VK_DYNAMIC_STATE_DEPTH_BIAS,
+ VK_DYNAMIC_STATE_BLEND_CONSTANTS,
+ VK_DYNAMIC_STATE_DEPTH_BOUNDS,
+ VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
+ VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
+ VK_DYNAMIC_STATE_STENCIL_REFERENCE,
+ },
+ },
+ .flags = 0,
+ .layout = device->meta_state.blit2d.img_p_layout,
+ .renderPass = device->meta_state.blit2d.render_pass,
+ .subpass = 0,
+ };
+
+ const struct anv_graphics_pipeline_create_info anv_pipeline_info = {
+ .color_attachment_count = -1,
+ .use_repclear = false,
+ .disable_vs = true,
+ .use_rectlist = true
+ };
+
+ result = anv_graphics_pipeline_create(anv_device_to_handle(device),
+ VK_NULL_HANDLE,
+ &vk_pipeline_info, &anv_pipeline_info,
+ &device->meta_state.alloc,
+ &device->meta_state.blit2d.pipelines[src_type][dst_type]);
+
+ ralloc_free(vs.nir);
+ ralloc_free(fs.nir);
+
+ return result;
+}
+
+VkResult
+anv_device_init_meta_blit2d_state(struct anv_device *device)
+{
+ VkResult result;
+
+ zero(device->meta_state.blit2d);
+
+ result = anv_CreateRenderPass(anv_device_to_handle(device),
+ &(VkRenderPassCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
+ .attachmentCount = 1,
+ .pAttachments = &(VkAttachmentDescription) {
+ .format = VK_FORMAT_UNDEFINED, /* Our shaders don't care */
+ .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
+ .storeOp = VK_ATTACHMENT_STORE_OP_STORE,
+ .initialLayout = VK_IMAGE_LAYOUT_GENERAL,
+ .finalLayout = VK_IMAGE_LAYOUT_GENERAL,
+ },
+ .subpassCount = 1,
+ .pSubpasses = &(VkSubpassDescription) {
+ .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
+ .inputAttachmentCount = 0,
+ .colorAttachmentCount = 1,
+ .pColorAttachments = &(VkAttachmentReference) {
+ .attachment = 0,
+ .layout = VK_IMAGE_LAYOUT_GENERAL,
+ },
+ .pResolveAttachments = NULL,
+ .pDepthStencilAttachment = &(VkAttachmentReference) {
+ .attachment = VK_ATTACHMENT_UNUSED,
+ .layout = VK_IMAGE_LAYOUT_GENERAL,
+ },
+ .preserveAttachmentCount = 1,
+ .pPreserveAttachments = (uint32_t[]) { 0 },
+ },
+ .dependencyCount = 0,
+ }, &device->meta_state.alloc, &device->meta_state.blit2d.render_pass);
+ if (result != VK_SUCCESS)
+ goto fail;
+
+ result = anv_CreateDescriptorSetLayout(anv_device_to_handle(device),
+ &(VkDescriptorSetLayoutCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
+ .bindingCount = 1,
+ .pBindings = (VkDescriptorSetLayoutBinding[]) {
+ {
+ .binding = 0,
+ .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
+ .descriptorCount = 1,
+ .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT,
+ .pImmutableSamplers = NULL
+ },
+ }
+ }, &device->meta_state.alloc, &device->meta_state.blit2d.img_ds_layout);
+ if (result != VK_SUCCESS)
+ goto fail;
+
+ result = anv_CreatePipelineLayout(anv_device_to_handle(device),
+ &(VkPipelineLayoutCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
+ .setLayoutCount = 1,
+ .pSetLayouts = &device->meta_state.blit2d.img_ds_layout,
+ },
+ &device->meta_state.alloc, &device->meta_state.blit2d.img_p_layout);
+ if (result != VK_SUCCESS)
+ goto fail;
+
+ result = anv_CreateDescriptorSetLayout(anv_device_to_handle(device),
+ &(VkDescriptorSetLayoutCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
+ .bindingCount = 1,
+ .pBindings = (VkDescriptorSetLayoutBinding[]) {
+ {
+ .binding = 0,
+ .descriptorType = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER,
+ .descriptorCount = 1,
+ .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT,
+ .pImmutableSamplers = NULL
+ },
+ }
+ }, &device->meta_state.alloc, &device->meta_state.blit2d.buf_ds_layout);
+ if (result != VK_SUCCESS)
+ goto fail;
+
+ result = anv_CreatePipelineLayout(anv_device_to_handle(device),
+ &(VkPipelineLayoutCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
+ .setLayoutCount = 1,
+ .pSetLayouts = &device->meta_state.blit2d.buf_ds_layout,
+ },
+ &device->meta_state.alloc, &device->meta_state.blit2d.buf_p_layout);
+ if (result != VK_SUCCESS)
+ goto fail;
+
+ for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) {
+ for (unsigned dst = 0; dst < BLIT2D_NUM_DST_TYPES; dst++) {
+ result = blit2d_init_pipeline(device, src, dst);
+ if (result != VK_SUCCESS)
+ goto fail;
+ }
+ }
+
+ return VK_SUCCESS;
+
+fail:
+ anv_device_finish_meta_blit2d_state(device);
+ return result;
+}