- struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
- uint32_t *p;
-
- uint32_t vb_emit = cmd_buffer->state.vb_dirty & pipeline->vb_used;
-
- assert((pipeline->active_stages & VK_SHADER_STAGE_COMPUTE_BIT) == 0);
-
- genX(flush_pipeline_select_3d)(cmd_buffer);
-
- if (vb_emit) {
- const uint32_t num_buffers = __builtin_popcount(vb_emit);
- const uint32_t num_dwords = 1 + num_buffers * 4;
-
- p = anv_batch_emitn(&cmd_buffer->batch, num_dwords,
- GENX(3DSTATE_VERTEX_BUFFERS));
- uint32_t vb, i = 0;
- for_each_bit(vb, vb_emit) {
- struct anv_buffer *buffer = cmd_buffer->state.vertex_bindings[vb].buffer;
- uint32_t offset = cmd_buffer->state.vertex_bindings[vb].offset;
-
- struct GENX(VERTEX_BUFFER_STATE) state = {
- .VertexBufferIndex = vb,
- .BufferAccessType = pipeline->instancing_enable[vb] ? INSTANCEDATA : VERTEXDATA,
- .VertexBufferMemoryObjectControlState = GENX(MOCS),
- .AddressModifyEnable = true,
- .BufferPitch = pipeline->binding_stride[vb],
- .BufferStartingAddress = { buffer->bo, buffer->offset + offset },
- .EndAddress = { buffer->bo, buffer->offset + buffer->size - 1},
- .InstanceDataStepRate = 1
- };
-
- GENX(VERTEX_BUFFER_STATE_pack)(&cmd_buffer->batch, &p[1 + i * 4], &state);
- i++;
- }
- }
-
- if (cmd_buffer->state.dirty & ANV_CMD_DIRTY_PIPELINE) {
- /* If somebody compiled a pipeline after starting a command buffer the
- * scratch bo may have grown since we started this cmd buffer (and
- * emitted STATE_BASE_ADDRESS). If we're binding that pipeline now,
- * reemit STATE_BASE_ADDRESS so that we use the bigger scratch bo. */
- if (cmd_buffer->state.scratch_size < pipeline->total_scratch)
- gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
-
- anv_batch_emit_batch(&cmd_buffer->batch, &pipeline->batch);
-
- /* From the BDW PRM for 3DSTATE_PUSH_CONSTANT_ALLOC_VS:
- *
- * "The 3DSTATE_CONSTANT_VS must be reprogrammed prior to
- * the next 3DPRIMITIVE command after programming the
- * 3DSTATE_PUSH_CONSTANT_ALLOC_VS"
- *
- * Since 3DSTATE_PUSH_CONSTANT_ALLOC_VS is programmed as part of
- * pipeline setup, we need to dirty push constants.
- */
- cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_ALL_GRAPHICS;
- }
-
- if (cmd_buffer->state.descriptors_dirty & VK_SHADER_STAGE_VERTEX_BIT ||
- cmd_buffer->state.push_constants_dirty & VK_SHADER_STAGE_VERTEX_BIT) {
- /* From the IVB PRM Vol. 2, Part 1, Section 3.2.1:
- *
- * "A PIPE_CONTROL with Post-Sync Operation set to 1h and a depth
- * stall needs to be sent just prior to any 3DSTATE_VS,
- * 3DSTATE_URB_VS, 3DSTATE_CONSTANT_VS,
- * 3DSTATE_BINDING_TABLE_POINTER_VS,
- * 3DSTATE_SAMPLER_STATE_POINTER_VS command. Only one
- * PIPE_CONTROL needs to be sent before any combination of VS
- * associated 3DSTATE."
- */
- anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL),
- .DepthStallEnable = true,
- .PostSyncOperation = WriteImmediateData,
- .Address = { &cmd_buffer->device->workaround_bo, 0 });
- }
-
- uint32_t dirty = 0;
- if (cmd_buffer->state.descriptors_dirty) {
- dirty = gen7_cmd_buffer_flush_descriptor_sets(cmd_buffer);
- gen7_cmd_buffer_emit_descriptor_pointers(cmd_buffer, dirty);
- }
-
- if (cmd_buffer->state.push_constants_dirty)
- cmd_buffer_flush_push_constants(cmd_buffer);
-
- /* We use the gen8 state here because it only contains the additional
- * min/max fields and, since they occur at the end of the packet and
- * don't change the stride, they work on gen7 too.
- */
- if (cmd_buffer->state.dirty & ANV_CMD_DIRTY_DYNAMIC_VIEWPORT)
- gen8_cmd_buffer_emit_viewport(cmd_buffer);
-
- if (cmd_buffer->state.dirty & ANV_CMD_DIRTY_DYNAMIC_SCISSOR)
- gen7_cmd_buffer_emit_scissor(cmd_buffer);
-
- if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
- ANV_CMD_DIRTY_RENDER_TARGETS |
- ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH |
- ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS)) {
-
- bool enable_bias = cmd_buffer->state.dynamic.depth_bias.bias != 0.0f ||
- cmd_buffer->state.dynamic.depth_bias.slope != 0.0f;
-
- const struct anv_image_view *iview =
- anv_cmd_buffer_get_depth_stencil_view(cmd_buffer);
- const struct anv_image *image = iview ? iview->image : NULL;
- const struct anv_format *anv_format =
- iview ? anv_format_for_vk_format(iview->vk_format) : NULL;
- const bool has_depth = iview && anv_format->has_depth;
- const uint32_t depth_format = has_depth ?
- isl_surf_get_depth_format(&cmd_buffer->device->isl_dev,
- &image->depth_surface.isl) : D16_UNORM;