+
+ if (aux_usage != ISL_AUX_USAGE_NONE) {
+ uint32_t aux_offset = iview->offset + iview->image->aux_surface.offset;
+
+ /* On gen7 and prior, the bottom 12 bits of the MCS base address are
+ * used to store other information. This should be ok, however, because
+ * surface buffer addresses are always 4K page alinged.
+ */
+ assert((aux_offset & 0xfff) == 0);
+ uint32_t *aux_addr_dw = state.map + isl_dev->ss.aux_addr_offset;
+ aux_offset += *aux_addr_dw & 0xfff;
+
+ anv_reloc_list_add(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc,
+ state.offset + isl_dev->ss.aux_addr_offset,
+ iview->bo, aux_offset);
+ }
+}
+
+static bool
+color_is_zero_one(VkClearColorValue value, enum isl_format format)
+{
+ if (isl_format_has_int_channel(format)) {
+ for (unsigned i = 0; i < 4; i++) {
+ if (value.int32[i] != 0 && value.int32[i] != 1)
+ return false;
+ }
+ } else {
+ for (unsigned i = 0; i < 4; i++) {
+ if (value.float32[i] != 0.0f && value.float32[i] != 1.0f)
+ return false;
+ }
+ }
+
+ return true;
+}
+
+static void
+color_attachment_compute_aux_usage(struct anv_device *device,
+ struct anv_attachment_state *att_state,
+ struct anv_image_view *iview,
+ VkRect2D render_area,
+ union isl_color_value *fast_clear_color)
+{
+ if (iview->image->aux_surface.isl.size == 0) {
+ att_state->aux_usage = ISL_AUX_USAGE_NONE;
+ att_state->input_aux_usage = ISL_AUX_USAGE_NONE;
+ att_state->fast_clear = false;
+ return;
+ }
+
+ assert(iview->image->aux_surface.isl.usage & ISL_SURF_USAGE_CCS_BIT);
+
+ att_state->clear_color_is_zero_one =
+ color_is_zero_one(att_state->clear_value.color, iview->isl.format);
+
+ if (att_state->pending_clear_aspects == VK_IMAGE_ASPECT_COLOR_BIT) {
+ /* Start off assuming fast clears are possible */
+ att_state->fast_clear = true;
+
+ /* Potentially, we could do partial fast-clears but doing so has crazy
+ * alignment restrictions. It's easier to just restrict to full size
+ * fast clears for now.
+ */
+ if (render_area.offset.x != 0 ||
+ render_area.offset.y != 0 ||
+ render_area.extent.width != iview->extent.width ||
+ render_area.extent.height != iview->extent.height)
+ att_state->fast_clear = false;
+
+ if (GEN_GEN <= 7) {
+ /* On gen7, we can't do multi-LOD or multi-layer fast-clears. We
+ * technically can, but it comes with crazy restrictions that we
+ * don't want to deal with now.
+ */
+ if (iview->isl.base_level > 0 ||
+ iview->isl.base_array_layer > 0 ||
+ iview->isl.array_len > 1)
+ att_state->fast_clear = false;
+ }
+
+ /* On Broadwell and earlier, we can only handle 0/1 clear colors */
+ if (GEN_GEN <= 8 && !att_state->clear_color_is_zero_one)
+ att_state->fast_clear = false;
+
+ if (att_state->fast_clear) {
+ memcpy(fast_clear_color->u32, att_state->clear_value.color.uint32,
+ sizeof(fast_clear_color->u32));
+ }
+ } else {
+ att_state->fast_clear = false;
+ }
+
+ /**
+ * TODO: Consider using a heuristic to determine if temporarily enabling
+ * CCS_E for this image view would be beneficial.
+ *
+ * While fast-clear resolves and partial resolves are fairly cheap in the
+ * case where you render to most of the pixels, full resolves are not
+ * because they potentially involve reading and writing the entire
+ * framebuffer. If we can't texture with CCS_E, we should leave it off and
+ * limit ourselves to fast clears.
+ */
+ if (iview->image->aux_usage == ISL_AUX_USAGE_CCS_E) {
+ att_state->aux_usage = ISL_AUX_USAGE_CCS_E;
+ att_state->input_aux_usage = ISL_AUX_USAGE_CCS_E;
+ } else if (att_state->fast_clear) {
+ att_state->aux_usage = ISL_AUX_USAGE_CCS_D;
+ if (GEN_GEN >= 9 &&
+ !isl_format_supports_ccs_e(&device->info, iview->isl.format)) {
+ /* From the Sky Lake PRM, RENDER_SURFACE_STATE::AuxiliarySurfaceMode:
+ *
+ * "If Number of Multisamples is MULTISAMPLECOUNT_1, AUX_CCS_D
+ * setting is only allowed if Surface Format supported for Fast
+ * Clear. In addition, if the surface is bound to the sampling
+ * engine, Surface Format must be supported for Render Target
+ * Compression for surfaces bound to the sampling engine."
+ *
+ * In other words, we can't sample from a fast-cleared image if it
+ * doesn't also support color compression.
+ */
+ att_state->input_aux_usage = ISL_AUX_USAGE_NONE;
+ } else if (GEN_GEN == 8) {
+ /* Broadwell can sample from fast-cleared images */
+ att_state->input_aux_usage = ISL_AUX_USAGE_CCS_D;
+ } else {
+ /* Ivy Bridge and Haswell cannot */
+ att_state->input_aux_usage = ISL_AUX_USAGE_NONE;
+ }
+ } else {
+ att_state->aux_usage = ISL_AUX_USAGE_NONE;
+ att_state->input_aux_usage = ISL_AUX_USAGE_NONE;
+ }
+}
+
+static bool
+need_input_attachment_state(const struct anv_render_pass_attachment *att)
+{
+ if (!(att->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT))
+ return false;
+
+ /* We only allocate input attachment states for color surfaces. Compression
+ * is not yet enabled for depth textures and stencil doesn't allow
+ * compression so we can just use the texture surface state from the view.
+ */
+ return vk_format_is_color(att->format);
+}
+
+static enum isl_aux_usage
+layout_to_hiz_usage(VkImageLayout layout, uint8_t samples)
+{
+ switch (layout) {
+ case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
+ return ISL_AUX_USAGE_HIZ;
+ case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
+ case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
+ if (anv_can_sample_with_hiz(GEN_GEN, samples))
+ return ISL_AUX_USAGE_HIZ;
+ /* Fall-through */
+ case VK_IMAGE_LAYOUT_GENERAL:
+ /* This buffer could be used as a source or destination in a transfer
+ * operation. Transfer operations current don't perform HiZ-enabled reads
+ * and writes.
+ */
+ default:
+ return ISL_AUX_USAGE_NONE;
+ }
+}
+
+/* Transitions a HiZ-enabled depth buffer from one layout to another. Unless
+ * the initial layout is undefined, the HiZ buffer and depth buffer will
+ * represent the same data at the end of this operation.
+ */
+static void
+transition_depth_buffer(struct anv_cmd_buffer *cmd_buffer,
+ const struct anv_image *image,
+ VkImageLayout initial_layout,
+ VkImageLayout final_layout)
+{
+ assert(image);
+
+ if (image->aux_usage != ISL_AUX_USAGE_HIZ || final_layout == initial_layout)
+ return;
+
+ const bool hiz_enabled = layout_to_hiz_usage(initial_layout, image->samples) ==
+ ISL_AUX_USAGE_HIZ;
+ const bool enable_hiz = layout_to_hiz_usage(final_layout, image->samples) ==
+ ISL_AUX_USAGE_HIZ;
+
+ enum blorp_hiz_op hiz_op;
+ if (initial_layout == VK_IMAGE_LAYOUT_UNDEFINED) {
+ /* We've already initialized the aux HiZ buffer at BindImageMemory time,
+ * so there's no need to perform a HIZ resolve or clear to avoid GPU hangs.
+ * This initial layout indicates that the user doesn't care about the data
+ * that's currently in the buffer, so resolves are not necessary except
+ * for the special case noted below.
+ */
+ hiz_op = BLORP_HIZ_OP_NONE;
+ } else if (hiz_enabled && !enable_hiz) {
+ hiz_op = BLORP_HIZ_OP_DEPTH_RESOLVE;
+ } else if (!hiz_enabled && enable_hiz) {
+ hiz_op = BLORP_HIZ_OP_HIZ_RESOLVE;
+ } else {
+ assert(hiz_enabled == enable_hiz);
+ /* If the same buffer will be used, no resolves are necessary except for
+ * the special case noted below.
+ */
+ hiz_op = BLORP_HIZ_OP_NONE;
+ }
+
+ if (hiz_op != BLORP_HIZ_OP_NONE)
+ anv_gen8_hiz_op_resolve(cmd_buffer, image, hiz_op);
+
+ /* Images that have sampling with HiZ enabled cause all shader sampling to
+ * load data with the HiZ buffer. Therefore, in the case of transitioning to
+ * the general layout - which currently routes all writes to the depth
+ * buffer - we must ensure that the HiZ buffer remains consistent with the
+ * depth buffer by performing an additional HIZ resolve if the operation
+ * required by this transition was not already a HiZ resolve.
+ */
+ if (final_layout == VK_IMAGE_LAYOUT_GENERAL &&
+ anv_can_sample_with_hiz(GEN_GEN, image->samples) &&
+ hiz_op != BLORP_HIZ_OP_HIZ_RESOLVE) {
+ anv_gen8_hiz_op_resolve(cmd_buffer, image, BLORP_HIZ_OP_HIZ_RESOLVE);
+ }