-/**
- * Enum for keeping track of the different MSAA layouts supported by Gen7.
- */
-enum intel_msaa_layout
-{
- /**
- * Ordinary surface with no MSAA.
- */
- INTEL_MSAA_LAYOUT_NONE,
-
- /**
- * Interleaved Multisample Surface. The additional samples are
- * accommodated by scaling up the width and the height of the surface so
- * that all the samples corresponding to a pixel are located at nearby
- * memory locations.
- */
- INTEL_MSAA_LAYOUT_IMS,
-
- /**
- * Uncompressed Multisample Surface. The surface is stored as a 2D array,
- * with array slice n containing all pixel data for sample n.
- */
- INTEL_MSAA_LAYOUT_UMS,
-
- /**
- * Compressed Multisample Surface. The surface is stored as in
- * INTEL_MSAA_LAYOUT_UMS, but there is an additional buffer called the MCS
- * (Multisample Control Surface) buffer. Each pixel in the MCS buffer
- * indicates the mapping from sample number to array slice. This allows
- * the common case (where all samples constituting a pixel have the same
- * color value) to be stored efficiently by just using a single array
- * slice.
- */
- INTEL_MSAA_LAYOUT_CMS,
-};
-
-
-#ifndef I915
-/**
- * Enum for keeping track of the state of an MCS buffer associated with a
- * miptree. This determines when fast clear related operations are needed.
- *
- * Fast clear works by deferring the memory writes that would be used to clear
- * the buffer, so that instead of performing them at the time of the clear
- * operation, the hardware automatically performs them at the time that the
- * buffer is later accessed for rendering. The MCS buffer keeps track of
- * which regions of the buffer still have pending clear writes.
- *
- * This enum keeps track of the driver's knowledge of the state of the MCS
- * buffer.
- *
- * MCS buffers only exist on Gen7+.
- */
-enum intel_mcs_state
-{
- /**
- * There is no MCS buffer for this miptree, and one should never be
- * allocated.
- */
- INTEL_MCS_STATE_NONE,
-
- /**
- * An MCS buffer exists for this miptree, and it is used for MSAA purposes.
- */
- INTEL_MCS_STATE_MSAA,
-
- /**
- * No deferred clears are pending for this miptree, and the contents of the
- * color buffer are entirely correct. An MCS buffer may or may not exist
- * for this miptree. If it does exist, it is entirely in the "no deferred
- * clears pending" state. If it does not exist, it will be created the
- * first time a fast color clear is executed.
- *
- * In this state, the color buffer can be used for purposes other than
- * rendering without needing a render target resolve.
- */
- INTEL_MCS_STATE_RESOLVED,
-
- /**
- * An MCS buffer exists for this miptree, and deferred clears are pending
- * for some regions of the color buffer, as indicated by the MCS buffer.
- * The contents of the color buffer are only correct for the regions where
- * the MCS buffer doesn't indicate a deferred clear.
- *
- * In this state, a render target resolve must be performed before the
- * color buffer can be used for purposes other than rendering.
- */
- INTEL_MCS_STATE_UNRESOLVED,
-
- /**
- * An MCS buffer exists for this miptree, and deferred clears are pending
- * for the entire color buffer, and the contents of the MCS buffer reflect
- * this. The contents of the color buffer are undefined.
- *
- * In this state, a render target resolve must be performed before the
- * color buffer can be used for purposes other than rendering.
- *
- * If the client attempts to clear a buffer which is already in this state,
- * the clear can be safely skipped, since the buffer is already clear.
- */
- INTEL_MCS_STATE_CLEAR,
-};
-#endif