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i965/fs: Replace fs_reg::subreg_offset with fs_reg::offset expressed in bytes.
[mesa.git]
/
src
/
mesa
/
drivers
/
dri
/
i965
/
brw_binding_tables.c
diff --git
a/src/mesa/drivers/dri/i965/brw_binding_tables.c
b/src/mesa/drivers/dri/i965/brw_binding_tables.c
index 80935cf0aaea3691e7a88fd7ba5e48bcc200efa2..9ca841a9de0e1969c31d43df4320651692f2b535 100644
(file)
--- a/
src/mesa/drivers/dri/i965/brw_binding_tables.c
+++ b/
src/mesa/drivers/dri/i965/brw_binding_tables.c
@@
-100,7
+100,7
@@
brw_upload_binding_table(struct brw_context *brw,
} else {
/* Upload a new binding table. */
if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
} else {
/* Upload a new binding table. */
if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
- brw
->vtbl.
emit_buffer_surface_state(
+ brw
_
emit_buffer_surface_state(
brw, &stage_state->surf_offset[
prog_data->binding_table.shader_time_start],
brw->shader_time.bo, 0, BRW_SURFACEFORMAT_RAW,
brw, &stage_state->surf_offset[
prog_data->binding_table.shader_time_start],
brw->shader_time.bo, 0, BRW_SURFACEFORMAT_RAW,
@@
-166,6
+166,7
@@
const struct brw_tracked_state brw_vs_binding_table = {
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
BRW_NEW_VS_CONSTBUF |
BRW_NEW_VS_PROG_DATA |
BRW_NEW_SURFACES,
BRW_NEW_VS_CONSTBUF |
BRW_NEW_VS_PROG_DATA |
BRW_NEW_SURFACES,
@@
-190,18
+191,19
@@
const struct brw_tracked_state brw_wm_binding_table = {
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
BRW_NEW_FS_PROG_DATA |
BRW_NEW_SURFACES,
},
.emit = brw_upload_wm_binding_table,
};
BRW_NEW_FS_PROG_DATA |
BRW_NEW_SURFACES,
},
.emit = brw_upload_wm_binding_table,
};
-/** Upload the TCS binding table (if
TCS is
active). */
+/** Upload the TCS binding table (if
tessellation stages are
active). */
static void
brw_tcs_upload_binding_table(struct brw_context *brw)
{
static void
brw_tcs_upload_binding_table(struct brw_context *brw)
{
- /*
If there's no TCS, skip changing anything
. */
- if (brw->tess_
ctr
l_program == NULL)
+ /*
Skip if the tessellation stages are disabled
. */
+ if (brw->tess_
eva
l_program == NULL)
return;
/* BRW_NEW_TCS_PROG_DATA */
return;
/* BRW_NEW_TCS_PROG_DATA */
@@
-216,6
+218,8
@@
const struct brw_tracked_state brw_tcs_binding_table = {
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
+ BRW_NEW_DEFAULT_TESS_LEVELS |
BRW_NEW_SURFACES |
BRW_NEW_TCS_CONSTBUF |
BRW_NEW_TCS_PROG_DATA,
BRW_NEW_SURFACES |
BRW_NEW_TCS_CONSTBUF |
BRW_NEW_TCS_PROG_DATA,
@@
-243,6
+247,7
@@
const struct brw_tracked_state brw_tes_binding_table = {
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
BRW_NEW_SURFACES |
BRW_NEW_TES_CONSTBUF |
BRW_NEW_TES_PROG_DATA,
BRW_NEW_SURFACES |
BRW_NEW_TES_CONSTBUF |
BRW_NEW_TES_PROG_DATA,
@@
-270,6
+275,7
@@
const struct brw_tracked_state brw_gs_binding_table = {
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
BRW_NEW_GS_CONSTBUF |
BRW_NEW_GS_PROG_DATA |
BRW_NEW_SURFACES,
BRW_NEW_GS_CONSTBUF |
BRW_NEW_GS_PROG_DATA |
BRW_NEW_SURFACES,
@@
-364,7
+370,7
@@
gen7_disable_hw_binding_tables(struct brw_context *brw)
/**
* Enable hardware binding tables and set up the binding table pool.
*/
/**
* Enable hardware binding tables and set up the binding table pool.
*/
-
static
void
+void
gen7_enable_hw_binding_tables(struct brw_context *brw)
{
if (!brw->use_resource_streamer)
gen7_enable_hw_binding_tables(struct brw_context *brw)
{
if (!brw->use_resource_streamer)
@@
-424,7
+430,8
@@
gen7_reset_hw_bt_pool_offsets(struct brw_context *brw)
const struct brw_tracked_state gen7_hw_binding_tables = {
.dirty = {
.mesa = 0,
const struct brw_tracked_state gen7_hw_binding_tables = {
.dirty = {
.mesa = 0,
- .brw = BRW_NEW_BATCH,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP,
},
.emit = gen7_enable_hw_binding_tables
};
},
.emit = gen7_enable_hw_binding_tables
};
@@
-459,6
+466,7
@@
const struct brw_tracked_state brw_binding_table_pointers = {
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
BRW_NEW_BINDING_TABLE_POINTERS |
BRW_NEW_STATE_BASE_ADDRESS,
},
BRW_NEW_BINDING_TABLE_POINTERS |
BRW_NEW_STATE_BASE_ADDRESS,
},
@@
-493,6
+501,7
@@
const struct brw_tracked_state gen6_binding_table_pointers = {
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
BRW_NEW_BINDING_TABLE_POINTERS |
BRW_NEW_STATE_BASE_ADDRESS,
},
BRW_NEW_BINDING_TABLE_POINTERS |
BRW_NEW_STATE_BASE_ADDRESS,
},