-bool
-brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
- GLbitfield mask, bool partial_clear, bool encode_srgb);
-
-void
-brw_blorp_resolve_color(struct brw_context *brw,
- struct intel_mipmap_tree *mt);
-
-/**
- * Binding table indices used by BLORP.
- */
-enum {
- BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
- BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
- BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
-};
-
-struct brw_blorp_surface_info
-{
- struct intel_mipmap_tree *mt;
-
- /**
- * The miplevel to use.
- */
- uint32_t level;
-
- /**
- * The 2D layer within the miplevel. Combined, level and layer define the
- * 2D miptree slice to use.
- *
- * Note: if mt is a 2D multisample array texture on Gen7+ using
- * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, layer is the physical
- * layer holding sample 0. So, for example, if mt->num_samples == 4, then
- * logical layer n corresponds to layer == 4*n.
- */
- uint32_t layer;
-
- /**
- * Width of the miplevel to be used. For surfaces using
- * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
- */
- uint32_t width;
-
- /**
- * Height of the miplevel to be used. For surfaces using
- * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
- */
- uint32_t height;
-
- /**
- * X offset within the surface to texture from (or render to). For
- * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
- * pixels.
- */
- uint32_t x_offset;
-
- /**
- * Y offset within the surface to texture from (or render to). For
- * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
- * pixels.
- */
- uint32_t y_offset;
-
- /* Setting this flag indicates that the buffer's contents are W-tiled
- * stencil data, but the surface state should be set up for Y tiled
- * MESA_FORMAT_R_UNORM8 data (this is necessary because surface states don't
- * support W tiling).
- *
- * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of
- * MESA_FORMAT_R_UNORM8 data are 128 pixels wide by 32 pixels high, the width and
- * pitch stored in the surface state will be multiplied by 2, and the
- * height will be halved. Also, since W and Y tiles store their data in a
- * different order, the width and height will be rounded up to a multiple
- * of the tile size, to ensure that the WM program can access the full
- * width and height of the buffer.
- */
- bool map_stencil_as_y_tiled;
-
- unsigned num_samples;
-
- /**
- * Indicates if we use the standard miptree layout (ALL_LOD_IN_EACH_SLICE),
- * or if we tightly pack array slices at each LOD (ALL_SLICES_AT_EACH_LOD).
- *
- * If ALL_SLICES_AT_EACH_LOD is set, then ARYSPC_LOD0 can be used. Ignored
- * prior to Gen7.
- */
- enum miptree_array_layout array_layout;
-
- /**
- * Format that should be used when setting up the surface state for this
- * surface. Should correspond to one of the BRW_SURFACEFORMAT_* enums.
- */
- uint32_t brw_surfaceformat;
-
- /**
- * For MSAA surfaces, MSAA layout that should be used when setting up the
- * surface state for this surface.
- */
- enum intel_msaa_layout msaa_layout;
-
- /**
- * In order to support cases where RGBA format is backing client requested
- * RGB, one needs to have means to force alpha channel to one when user
- * requested RGB surface is used as blit source. This is possible by
- * setting source swizzle for the texture surface.
- */
- int swizzle;
-};
-
-void
-brw_blorp_surface_info_init(struct brw_context *brw,
- struct brw_blorp_surface_info *info,
- struct intel_mipmap_tree *mt,
- unsigned int level, unsigned int layer,
- mesa_format format, bool is_render_target);
-
-uint32_t
-brw_blorp_compute_tile_offsets(const struct brw_blorp_surface_info *info,
- uint32_t *tile_x, uint32_t *tile_y);
-
-
-
-struct brw_blorp_coord_transform
-{
- float multiplier;
- float offset;
-};
-
-struct brw_blorp_wm_push_constants
-{
- uint32_t dst_x0;
- uint32_t dst_x1;
- uint32_t dst_y0;
- uint32_t dst_y1;
- /* Top right coordinates of the rectangular grid used for scaled blitting */
- float rect_grid_x1;
- float rect_grid_y1;
- struct brw_blorp_coord_transform x_transform;
- struct brw_blorp_coord_transform y_transform;
-
- /* Minimum layer setting works for all the textures types but texture_3d
- * for which the setting has no effect. Use the z-coordinate instead.
- */
- uint32_t src_z;
-
- /* Pad out to an integral number of registers */
- uint32_t pad[5];
-};
-
-#define BRW_BLORP_NUM_PUSH_CONSTANT_DWORDS \
- (sizeof(struct brw_blorp_wm_push_constants) / 4)
-
-/* Every 32 bytes of push constant data constitutes one GEN register. */
-static const unsigned int BRW_BLORP_NUM_PUSH_CONST_REGS =
- sizeof(struct brw_blorp_wm_push_constants) / 32;
-
-struct brw_blorp_prog_data
-{
- bool dispatch_8;
- bool dispatch_16;
-
- uint8_t first_curbe_grf_0;
- uint8_t first_curbe_grf_2;
-
- uint32_t ksp_offset_2;
-
- /**
- * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
- * than one sample per pixel.
- */
- bool persample_msaa_dispatch;
-
- /**
- * Mask of which FS inputs are marked flat by the shader source. This is
- * needed for setting up 3DSTATE_SF/SBE.
- */
- uint32_t flat_inputs;
- unsigned num_varying_inputs;
-
- /* The compiler will re-arrange push constants and store the upload order
- * here. Given an index 'i' in the final upload buffer, param[i] gives the
- * index in the uniform store. In other words, the value to be uploaded can
- * be found by brw_blorp_params::wm_push_consts[param[i]].
- */
- uint8_t nr_params;
- uint8_t param[BRW_BLORP_NUM_PUSH_CONSTANT_DWORDS];
-};
-
-struct brw_blorp_params
-{
- uint32_t x0;
- uint32_t y0;
- uint32_t x1;
- uint32_t y1;
- struct brw_blorp_surface_info depth;
- uint32_t depth_format;
- struct brw_blorp_surface_info src;
- struct brw_blorp_surface_info dst;
- enum gen6_hiz_op hiz_op;
- union {
- unsigned fast_clear_op;
- unsigned resolve_type;
- };
- bool color_write_disable[4];
- struct brw_blorp_wm_push_constants wm_push_consts;
- unsigned num_draw_buffers;
- unsigned num_layers;
- uint32_t wm_prog_kernel;
- struct brw_blorp_prog_data *wm_prog_data;
-};
-