- /* Start by setting up the intervals with no knowledge of control
- * flow.
- */
- int ip = 0;
- foreach_list(node, &this->instructions) {
- fs_inst *inst = (fs_inst *)node;
-
- for (unsigned int i = 0; i < 3; i++) {
- if (inst->src[i].file == GRF) {
- int reg = inst->src[i].reg;
-
- use[reg] = ip;
-
- /* In most cases, a register can be written over safely by the
- * same instruction that is its last use. For a single
- * instruction, the sources are dereferenced before writing of the
- * destination starts (naturally). This gets more complicated for
- * simd16, because the instruction:
- *
- * mov(16) g4<1>F g4<8,8,1>F g6<8,8,1>F
- *
- * is actually decoded in hardware as:
- *
- * mov(8) g4<1>F g4<8,8,1>F g6<8,8,1>F
- * mov(8) g5<1>F g5<8,8,1>F g7<8,8,1>F
- *
- * Which is safe. However, if we have uniform accesses
- * happening, we get into trouble:
- *
- * mov(8) g4<1>F g4<0,1,0>F g6<8,8,1>F
- * mov(8) g5<1>F g4<0,1,0>F g7<8,8,1>F
- *
- * Now our destination for the first instruction overwrote the
- * second instruction's src0, and we get garbage for those 8
- * pixels. There's a similar issue for the pre-gen6
- * pixel_x/pixel_y, which are registers of 16-bit values and thus
- * would get stomped by the first decode as well.
- */
- if (dispatch_width == 16 && (inst->src[i].smear ||
- (this->pixel_x.reg == reg ||
- this->pixel_y.reg == reg))) {
- use[reg]++;
- }
- }
- }
-
- if (inst->dst.file == GRF) {
- int reg = inst->dst.reg;
-
- def[reg] = MIN2(def[reg], ip);
- }