- brw->urb.nr_vs_entries = 24;
- if (brw->gs.prog_bo)
- brw->urb.nr_gs_entries = 4;
- else
- brw->urb.nr_gs_entries = 0;
- /* CACHE_NEW_VS_PROG */
- brw->urb.vs_size = MIN2(brw->vs.prog_data->urb_entry_size, 1);
+ int nr_vs_entries, nr_gs_entries;
+ int total_urb_size = brw->urb.size * 1024; /* in bytes */
+ const struct gen_device_info *devinfo = &brw->screen->devinfo;
+
+ /* Calculate how many entries fit in each stage's section of the URB */
+ if (gs_present) {
+ nr_vs_entries = (total_urb_size/2) / (vs_size * 128);
+ nr_gs_entries = (total_urb_size/2) / (gs_size * 128);
+ } else {
+ nr_vs_entries = total_urb_size / (vs_size * 128);
+ nr_gs_entries = 0;
+ }
+
+ /* Then clamp to the maximum allowed by the hardware */
+ if (nr_vs_entries > devinfo->urb.max_entries[MESA_SHADER_VERTEX])
+ nr_vs_entries = devinfo->urb.max_entries[MESA_SHADER_VERTEX];
+
+ if (nr_gs_entries > devinfo->urb.max_entries[MESA_SHADER_GEOMETRY])
+ nr_gs_entries = devinfo->urb.max_entries[MESA_SHADER_GEOMETRY];
+
+ /* Finally, both must be a multiple of 4 (see 3DSTATE_URB in the PRM). */
+ brw->urb.nr_vs_entries = ROUND_DOWN_TO(nr_vs_entries, 4);
+ brw->urb.nr_gs_entries = ROUND_DOWN_TO(nr_gs_entries, 4);
+
+ assert(brw->urb.nr_vs_entries >=
+ devinfo->urb.min_entries[MESA_SHADER_VERTEX]);
+ assert(brw->urb.nr_vs_entries % 4 == 0);
+ assert(brw->urb.nr_gs_entries % 4 == 0);
+ assert(vs_size <= 5);
+ assert(gs_size <= 5);