+
+ intel_batchbuffer_emit_mi_flush(intel->batch);
+
+ BEGIN_BATCH(6);
+ OUT_BATCH(CMD_3D_VS_STATE << 16 | (6 - 2));
+ OUT_RELOC(brw->vs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+ OUT_BATCH(GEN6_VS_SPF_MODE | (0 << GEN6_VS_SAMPLER_COUNT_SHIFT) |
+ (brw->vs.nr_surfaces << GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
+ OUT_BATCH(0); /* scratch space base offset */
+ OUT_BATCH((1 << GEN6_VS_DISPATCH_START_GRF_SHIFT) |
+ (brw->vs.prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
+ (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
+ OUT_BATCH((0 << GEN6_VS_MAX_THREADS_SHIFT) |
+ GEN6_VS_STATISTICS_ENABLE |
+ GEN6_VS_ENABLE);
+ ADVANCE_BATCH();
+
+ intel_batchbuffer_emit_mi_flush(intel->batch);