-static void
-gen8_emit_buffer_surface_state(struct brw_context *brw,
- uint32_t *out_offset,
- drm_intel_bo *bo,
- unsigned buffer_offset,
- unsigned surface_format,
- unsigned buffer_size,
- unsigned pitch,
- bool rw)
-{
- const unsigned mocs = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB;
- uint32_t *surf = allocate_surface_state(brw, out_offset);
-
- surf[0] = BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT |
- surface_format << BRW_SURFACE_FORMAT_SHIFT |
- BRW_SURFACE_RC_READ_WRITE;
- surf[1] = SET_FIELD(mocs, GEN8_SURFACE_MOCS);
-
- surf[2] = SET_FIELD((buffer_size - 1) & 0x7f, GEN7_SURFACE_WIDTH) |
- SET_FIELD(((buffer_size - 1) >> 7) & 0x3fff, GEN7_SURFACE_HEIGHT);
- if (surface_format == BRW_SURFACEFORMAT_RAW)
- surf[3] = SET_FIELD(((buffer_size - 1) >> 21) & 0x3ff, BRW_SURFACE_DEPTH);
- else
- surf[3] = SET_FIELD(((buffer_size - 1) >> 21) & 0x3f, BRW_SURFACE_DEPTH);
- surf[3] |= (pitch - 1);
- surf[7] = SET_FIELD(HSW_SCS_RED, GEN7_SURFACE_SCS_R) |
- SET_FIELD(HSW_SCS_GREEN, GEN7_SURFACE_SCS_G) |
- SET_FIELD(HSW_SCS_BLUE, GEN7_SURFACE_SCS_B) |
- SET_FIELD(HSW_SCS_ALPHA, GEN7_SURFACE_SCS_A);
- /* reloc */
- *((uint64_t *) &surf[8]) = (bo ? bo->offset64 : 0) + buffer_offset;
-
- /* Emit relocation to surface contents. */
- if (bo) {
- drm_intel_bo_emit_reloc(brw->batch.bo, *out_offset + 8 * 4,
- bo, buffer_offset, I915_GEM_DOMAIN_SAMPLER,
- rw ? I915_GEM_DOMAIN_SAMPLER : 0);
- }
-}
-
-static void
-gen8_update_texture_surface(struct gl_context *ctx,
- unsigned unit,
- uint32_t *surf_offset,
- bool for_gather)
-{
- struct brw_context *brw = brw_context(ctx);
- struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
- struct intel_texture_object *intelObj = intel_texture_object(tObj);
- struct intel_mipmap_tree *mt = intelObj->mt;
- struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
- struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
- struct intel_mipmap_tree *aux_mt = NULL;
- uint32_t aux_mode = 0;
- mesa_format format = intelObj->_Format;
- uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB;
-
- if (tObj->Target == GL_TEXTURE_BUFFER) {
- brw_update_buffer_texture_surface(ctx, unit, surf_offset);
- return;
- }
-
- if (tObj->StencilSampling && firstImage->_BaseFormat == GL_DEPTH_STENCIL) {
- mt = mt->stencil_mt;
- format = MESA_FORMAT_S_UINT8;
- }
-
- unsigned tiling_mode, pitch;
- if (format == MESA_FORMAT_S_UINT8) {
- tiling_mode = GEN8_SURFACE_TILING_W;
- pitch = 2 * mt->pitch;
- } else {
- tiling_mode = surface_tiling_mode(mt->tiling);
- pitch = mt->pitch;
- }
-
- if (mt->mcs_mt) {
- aux_mt = mt->mcs_mt;
- aux_mode = GEN8_SURFACE_AUX_MODE_MCS;
- }
-
- /* If this is a view with restricted NumLayers, then our effective depth
- * is not just the miptree depth.
- */
- uint32_t effective_depth =
- (tObj->Immutable && tObj->Target != GL_TEXTURE_3D) ? tObj->NumLayers
- : mt->logical_depth0;
-
- uint32_t tex_format = translate_tex_format(brw, format, sampler->sRGBDecode);
-
- uint32_t *surf = allocate_surface_state(brw, surf_offset);
-
- surf[0] = translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
- tex_format << BRW_SURFACE_FORMAT_SHIFT |
- vertical_alignment(mt) |
- horizontal_alignment(mt) |
- tiling_mode;
-
- if (tObj->Target == GL_TEXTURE_CUBE_MAP ||
- tObj->Target == GL_TEXTURE_CUBE_MAP_ARRAY) {
- surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES;
- }
-
- if (_mesa_is_array_texture(tObj->Target) ||
- tObj->Target == GL_TEXTURE_CUBE_MAP)
- surf[0] |= GEN8_SURFACE_IS_ARRAY;
-
- surf[1] = SET_FIELD(mocs_wb, GEN8_SURFACE_MOCS) | mt->qpitch >> 2;
-
- surf[2] = SET_FIELD(mt->logical_width0 - 1, GEN7_SURFACE_WIDTH) |
- SET_FIELD(mt->logical_height0 - 1, GEN7_SURFACE_HEIGHT);
-
- surf[3] = SET_FIELD(effective_depth - 1, BRW_SURFACE_DEPTH) | (pitch - 1);
-
- surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout) |
- SET_FIELD(tObj->MinLayer, GEN7_SURFACE_MIN_ARRAY_ELEMENT) |
- SET_FIELD(effective_depth - 1,
- GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT);
-
- surf[5] = SET_FIELD(tObj->MinLevel + tObj->BaseLevel - mt->first_level,
- GEN7_SURFACE_MIN_LOD) |
- (intelObj->_MaxLevel - tObj->BaseLevel); /* mip count */
-
- if (aux_mt) {
- surf[6] = SET_FIELD(mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) |
- SET_FIELD((aux_mt->pitch / 128) - 1, GEN8_SURFACE_AUX_PITCH) |
- aux_mode;
- } else {
- surf[6] = 0;
- }
-
- /* Handling GL_ALPHA as a surface format override breaks 1.30+ style
- * texturing functions that return a float, as our code generation always
- * selects the .x channel (which would always be 0).
- */
- const bool alpha_depth = tObj->DepthMode == GL_ALPHA &&
- (firstImage->_BaseFormat == GL_DEPTH_COMPONENT ||
- firstImage->_BaseFormat == GL_DEPTH_STENCIL);
-
- surf[7] = mt->fast_clear_color_value;
-
- const int swizzle =
- unlikely(alpha_depth) ? SWIZZLE_XYZW : brw_get_texture_swizzle(ctx, tObj);
- surf[7] |=
- SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 0)), GEN7_SURFACE_SCS_R) |
- SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 1)), GEN7_SURFACE_SCS_G) |
- SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 2)), GEN7_SURFACE_SCS_B) |
- SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 3)), GEN7_SURFACE_SCS_A);
-
- *((uint64_t *) &surf[8]) = mt->bo->offset64 + mt->offset; /* reloc */
-
- if (aux_mt) {
- *((uint64_t *) &surf[10]) = aux_mt->bo->offset64;
- drm_intel_bo_emit_reloc(brw->batch.bo, *surf_offset + 10 * 4,
- aux_mt->bo, 0,
- I915_GEM_DOMAIN_SAMPLER, 0);
- } else {
- surf[10] = 0;
- surf[11] = 0;
- }
- surf[12] = 0;
-
- /* Emit relocation to surface contents */
- drm_intel_bo_emit_reloc(brw->batch.bo,
- *surf_offset + 8 * 4,
- mt->bo,
- mt->offset,
- I915_GEM_DOMAIN_SAMPLER, 0);
-}
-