+static bool
+alignment_valid(struct brw_context *brw, unsigned offset, uint32_t tiling)
+{
+ /* Tiled buffers must be page-aligned (4K). */
+ if (tiling != I915_TILING_NONE)
+ return (offset & 4095) == 0;
+
+ /* On Gen8+, linear buffers must be cacheline-aligned. */
+ if (brw->gen >= 8)
+ return (offset & 63) == 0;
+
+ return true;
+}
+
+static bool
+can_fast_copy_blit(struct brw_context *brw,
+ drm_intel_bo *src_buffer,
+ int16_t src_x, int16_t src_y,
+ uintptr_t src_offset, uint32_t src_pitch,
+ uint32_t src_tiling, uint32_t src_tr_mode,
+ drm_intel_bo *dst_buffer,
+ int16_t dst_x, int16_t dst_y,
+ uintptr_t dst_offset, uint32_t dst_pitch,
+ uint32_t dst_tiling, uint32_t dst_tr_mode,
+ int16_t w, int16_t h, uint32_t cpp,
+ GLenum logic_op)
+{
+ const bool dst_tiling_none = dst_tiling == I915_TILING_NONE;
+ const bool src_tiling_none = src_tiling == I915_TILING_NONE;
+
+ if (brw->gen < 9)
+ return false;
+
+ /* Enable fast copy blit only if the surfaces are Yf/Ys tiled.
+ * FIXME: Based on performance data, remove this condition later to
+ * enable for all types of surfaces.
+ */
+ if (src_tr_mode == INTEL_MIPTREE_TRMODE_NONE &&
+ dst_tr_mode == INTEL_MIPTREE_TRMODE_NONE)
+ return false;
+
+ if (logic_op != GL_COPY)
+ return false;
+
+ /* The start pixel for Fast Copy blit should be on an OWord boundary. */
+ if ((dst_x * cpp | src_x * cpp) & 15)
+ return false;
+
+ /* For all surface types buffers must be cacheline-aligned. */
+ if ((dst_offset | src_offset) & 63)
+ return false;
+
+ /* Color depths which are not power of 2 or greater than 128 bits are
+ * not supported.
+ */
+ if (!_mesa_is_pow_two(cpp) || cpp > 16)
+ return false;
+
+ /* For Fast Copy Blits the pitch cannot be a negative number. So, bit 15
+ * of the destination pitch must be zero.
+ */
+ if ((src_pitch >> 15 & 1) != 0 || (dst_pitch >> 15 & 1) != 0)
+ return false;
+
+ /* For Linear surfaces, the pitch has to be an OWord (16byte) multiple. */
+ if ((src_tiling_none && src_pitch % 16 != 0) ||
+ (dst_tiling_none && dst_pitch % 16 != 0))
+ return false;
+
+ return true;
+}
+
+static uint32_t
+xy_blit_cmd(uint32_t src_tiling, uint32_t src_tr_mode,
+ uint32_t dst_tiling, uint32_t dst_tr_mode,
+ uint32_t cpp, bool use_fast_copy_blit)
+{
+ uint32_t CMD = 0;
+
+ if (use_fast_copy_blit) {
+ CMD = XY_FAST_COPY_BLT_CMD;
+
+ if (dst_tiling != I915_TILING_NONE)
+ SET_TILING_XY_FAST_COPY_BLT(dst_tiling, dst_tr_mode, XY_FAST_DST);
+
+ if (src_tiling != I915_TILING_NONE)
+ SET_TILING_XY_FAST_COPY_BLT(src_tiling, src_tr_mode, XY_FAST_SRC);
+ } else {
+ assert(cpp <= 4);
+ switch (cpp) {
+ case 1:
+ case 2:
+ CMD = XY_SRC_COPY_BLT_CMD;
+ break;
+ case 4:
+ CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
+ break;
+ default:
+ unreachable("not reached");
+ }
+
+ if (dst_tiling != I915_TILING_NONE)
+ CMD |= XY_DST_TILED;
+
+ if (src_tiling != I915_TILING_NONE)
+ CMD |= XY_SRC_TILED;
+ }
+ return CMD;
+}
+