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intel: Flush the render/texture cache when finishing render to texture.
[mesa.git]
/
src
/
mesa
/
drivers
/
dri
/
intel
/
intel_batchbuffer.h
diff --git
a/src/mesa/drivers/dri/intel/intel_batchbuffer.h
b/src/mesa/drivers/dri/intel/intel_batchbuffer.h
index 51579df09e771a9750cedaa0520378577ee78101..d4a94454dd52261bdf39336d99313d2582ef7061 100644
(file)
--- a/
src/mesa/drivers/dri/intel/intel_batchbuffer.h
+++ b/
src/mesa/drivers/dri/intel/intel_batchbuffer.h
@@
-62,6
+62,7
@@
struct intel_batchbuffer
} emit;
GLuint dirty_state;
} emit;
GLuint dirty_state;
+ GLuint reserved_space;
};
struct intel_batchbuffer *intel_batchbuffer_alloc(struct intel_context
};
struct intel_batchbuffer *intel_batchbuffer_alloc(struct intel_context
@@
-95,6
+96,7
@@
GLboolean intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
uint32_t read_domains,
uint32_t write_domain,
uint32_t offset);
uint32_t read_domains,
uint32_t write_domain,
uint32_t offset);
+void intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch);
/* Inline functions - might actually be better off with these
* non-inlined. Certainly better off switching all command packets to
/* Inline functions - might actually be better off with these
* non-inlined. Certainly better off switching all command packets to
@@
-104,7
+106,7
@@
GLboolean intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
static INLINE GLint
intel_batchbuffer_space(struct intel_batchbuffer *batch)
{
static INLINE GLint
intel_batchbuffer_space(struct intel_batchbuffer *batch)
{
- return (batch->size -
BATCH_RESERVED
) - (batch->ptr - batch->map);
+ return (batch->size -
batch->reserved_space
) - (batch->ptr - batch->map);
}
}
@@
-157,7
+159,7
@@
intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
#define OUT_BATCH(d) intel_batchbuffer_emit_dword(intel->batch, d)
#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
#define OUT_BATCH(d) intel_batchbuffer_emit_dword(intel->batch, d)
#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
- assert((
delta) >= 0);
\
+ assert((
unsigned) (delta) < buf->size);
\
intel_batchbuffer_emit_reloc(intel->batch, buf, \
read_domains, write_domain, delta); \
} while (0)
intel_batchbuffer_emit_reloc(intel->batch, buf, \
read_domains, write_domain, delta); \
} while (0)
@@
-173,12
+175,4
@@
intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
intel->batch->emit.start_ptr = NULL; \
} while(0)
intel->batch->emit.start_ptr = NULL; \
} while(0)
-
-static INLINE void
-intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch)
-{
- intel_batchbuffer_require_space(batch, 4, IGNORE_CLIPRECTS);
- intel_batchbuffer_emit_dword(batch, MI_FLUSH);
-}
-
#endif
#endif