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intel: Update renderbuffers unconditionally in intelSetTexBuffer2()
[mesa.git]
/
src
/
mesa
/
drivers
/
dri
/
intel
/
intel_clear.c
diff --git
a/src/mesa/drivers/dri/intel/intel_clear.c
b/src/mesa/drivers/dri/intel/intel_clear.c
index 1b0e221789a19a7a46a3661cd8f76a2604fe4be9..3c2211886606222d2a7ec33e14ce8bdc29dc4a57 100644
(file)
--- a/
src/mesa/drivers/dri/intel/intel_clear.c
+++ b/
src/mesa/drivers/dri/intel/intel_clear.c
@@
-33,12
+33,9
@@
#include "intel_context.h"
#include "intel_blit.h"
#include "intel_context.h"
#include "intel_blit.h"
-#include "intel_chipset.h"
#include "intel_clear.h"
#include "intel_fbo.h"
#include "intel_clear.h"
#include "intel_fbo.h"
-#include "intel_pixel.h"
#include "intel_regions.h"
#include "intel_regions.h"
-#include "intel_batchbuffer.h"
#define FILE_DEBUG_FLAG DEBUG_BLIT
#define FILE_DEBUG_FLAG DEBUG_BLIT
@@
-68,13
+65,17
@@
static void
intelClear(GLcontext *ctx, GLbitfield mask)
{
struct intel_context *intel = intel_context(ctx);
intelClear(GLcontext *ctx, GLbitfield mask)
{
struct intel_context *intel = intel_context(ctx);
- const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask);
+ const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask
[0]
);
GLbitfield tri_mask = 0;
GLbitfield blit_mask = 0;
GLbitfield swrast_mask = 0;
struct gl_framebuffer *fb = ctx->DrawBuffer;
GLuint i;
GLbitfield tri_mask = 0;
GLbitfield blit_mask = 0;
GLbitfield swrast_mask = 0;
struct gl_framebuffer *fb = ctx->DrawBuffer;
GLuint i;
+ if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) {
+ intel->front_buffer_dirty = GL_TRUE;
+ }
+
if (0)
fprintf(stderr, "%s\n", __FUNCTION__);
if (0)
fprintf(stderr, "%s\n", __FUNCTION__);
@@
-89,6
+90,10
@@
intelClear(GLcontext *ctx, GLbitfield mask)
tri_mask |= (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT));
}
tri_mask |= (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT));
}
+ /* Make sure we have up to date buffers before we start looking at
+ * the tiling bits to determine how to clear. */
+ intel_prepare_render(intel);
+
/* HW stencil */
if (mask & BUFFER_BIT_STENCIL) {
const struct intel_region *stencilRegion
/* HW stencil */
if (mask & BUFFER_BIT_STENCIL) {
const struct intel_region *stencilRegion
@@
-132,6
+137,12
@@
intelClear(GLcontext *ctx, GLbitfield mask)
}
}
}
}
+ if (intel->gen >= 6) {
+ /* Blits are in a different ringbuffer so we don't use them. */
+ tri_mask |= blit_mask;
+ blit_mask = 0;
+ }
+
/* SW fallback clearing */
swrast_mask = mask & ~tri_mask & ~blit_mask;
/* SW fallback clearing */
swrast_mask = mask & ~tri_mask & ~blit_mask;
@@
-172,7
+183,7
@@
intelClear(GLcontext *ctx, GLbitfield mask)
DBG("\n");
}
DBG("\n");
}
- _mesa_meta_
c
lear(&intel->ctx, tri_mask);
+ _mesa_meta_
C
lear(&intel->ctx, tri_mask);
}
if (swrast_mask) {
}
if (swrast_mask) {