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intel: Enable GL_EXT_framebuffer_object for gles2
[mesa.git]
/
src
/
mesa
/
drivers
/
dri
/
intel
/
intel_regions.h
diff --git
a/src/mesa/drivers/dri/intel/intel_regions.h
b/src/mesa/drivers/dri/intel/intel_regions.h
index 0d379bdc6e273c2483c3cb279fb668fbcefbfe6d..2459c9a924d255935cd1b4a1964a17473f8b0361 100644
(file)
--- a/
src/mesa/drivers/dri/intel/intel_regions.h
+++ b/
src/mesa/drivers/dri/intel/intel_regions.h
@@
-52,7
+52,7
@@
struct intel_buffer_object;
*/
struct intel_region
{
*/
struct intel_region
{
- dr
i
_bo *buffer; /**< buffer manager's buffer */
+ dr
m_intel
_bo *buffer; /**< buffer manager's buffer */
GLuint refcount; /**< Reference count for region */
GLuint cpp; /**< bytes per pixel */
GLuint width; /**< in pixels */
GLuint refcount; /**< Reference count for region */
GLuint cpp; /**< bytes per pixel */
GLuint width; /**< in pixels */
@@
-62,10
+62,13
@@
struct intel_region
GLuint map_refcount; /**< Reference count for mapping */
GLuint draw_offset; /**< Offset of drawing address within the region */
GLuint map_refcount; /**< Reference count for mapping */
GLuint draw_offset; /**< Offset of drawing address within the region */
+ GLuint draw_x, draw_y; /**< Offset of drawing within the region */
+
uint32_t tiling; /**< Which tiling mode the region is in */
uint32_t tiling; /**< Which tiling mode the region is in */
- uint32_t bit_6_swizzle; /**< GEM flag for address swizzling requirement */
- drmAddress classic_map; /**< drmMap of the region when not in GEM mode */
struct intel_buffer_object *pbo; /* zero-copy uploads */
struct intel_buffer_object *pbo; /* zero-copy uploads */
+
+ uint32_t name; /**< Global name for the bo */
+ struct intel_screen *screen;
};
};
@@
-75,7
+78,7
@@
struct intel_region
struct intel_region *intel_region_alloc(struct intel_context *intel,
uint32_t tiling,
GLuint cpp, GLuint width,
struct intel_region *intel_region_alloc(struct intel_context *intel,
uint32_t tiling,
GLuint cpp, GLuint width,
- GLuint height,
GLuint pitch,
+ GLuint height,
GLboolean expect_accelerated_upload);
struct intel_region *
GLboolean expect_accelerated_upload);
struct intel_region *
@@
-118,6
+121,7
@@
intel_region_copy(struct intel_context *intel,
struct intel_region *src,
GLuint src_offset,
GLuint srcx, GLuint srcy, GLuint width, GLuint height,
struct intel_region *src,
GLuint src_offset,
GLuint srcx, GLuint srcy, GLuint width, GLuint height,
+ GLboolean flip,
GLenum logicop);
/* Helpers for zerocopy uploads, particularly texture image uploads:
GLenum logicop);
/* Helpers for zerocopy uploads, particularly texture image uploads:
@@
-144,4
+148,12
@@
void _mesa_copy_rect(GLubyte * dst,
const GLubyte * src,
GLuint src_pitch, GLuint src_x, GLuint src_y);
const GLubyte * src,
GLuint src_pitch, GLuint src_x, GLuint src_y);
+struct __DRIimageRec {
+ struct intel_region *region;
+ GLenum internal_format;
+ GLuint format;
+ GLenum data_type;
+ void *data;
+};
+
#endif
#endif