+#elif defined(__x86_64__)
+
+#define rdtscll(val) do { \
+ unsigned int a,d; \
+ __asm__ volatile("rdtsc" : "=a" (a), "=d" (d)); \
+ (val) = ((unsigned long)a) | (((unsigned long)d)<<32); \
+} while(0)
+
+/* Copied from i386 PIII version */
+#define INIT_COUNTER() \
+ do { \
+ int cycle_i; \
+ counter_overhead = LONG_MAX; \
+ for ( cycle_i = 0 ; cycle_i < 16 ; cycle_i++ ) { \
+ unsigned long cycle_tmp1, cycle_tmp2; \
+ rdtscll(cycle_tmp1); \
+ rdtscll(cycle_tmp2); \
+ if ( counter_overhead > (cycle_tmp2 - cycle_tmp1) ) { \
+ counter_overhead = cycle_tmp2 - cycle_tmp1; \
+ } \
+ } \
+ } while (0)
+
+
+#define BEGIN_RACE(x) \
+ x = LONG_MAX; \
+ for ( cycle_i = 0 ; cycle_i < 10 ; cycle_i++ ) { \
+ unsigned long cycle_tmp1, cycle_tmp2; \
+ rdtscll(cycle_tmp1); \
+
+#define END_RACE(x) \
+ rdtscll(cycle_tmp2); \
+ if ( x > (cycle_tmp2 - cycle_tmp1) ) { \
+ x = cycle_tmp2 - cycle_tmp1; \
+ } \
+ } \
+ x -= counter_overhead;
+
+#elif defined(__sparc__)
+
+#define INIT_COUNTER() \
+ do { counter_overhead = 5; } while(0)
+
+#define BEGIN_RACE(x) \
+x = LONG_MAX; \
+for (cycle_i = 0; cycle_i <10; cycle_i++) { \
+ register long cycle_tmp1 __asm__("l0"); \
+ register long cycle_tmp2 __asm__("l1"); \
+ /* rd %tick, %l0 */ \
+ __asm__ __volatile__ (".word 0xa1410000" : "=r" (cycle_tmp1)); /* save timestamp */
+
+#define END_RACE(x) \
+ /* rd %tick, %l1 */ \
+ __asm__ __volatile__ (".word 0xa3410000" : "=r" (cycle_tmp2)); \
+ if (x > (cycle_tmp2-cycle_tmp1)) x = cycle_tmp2 - cycle_tmp1; \
+} \
+x -= counter_overhead;
+
+#else
+#error Your processor is not supported for RUN_XFORM_BENCHMARK
+#endif
+