-static void
-PrintSrcReg(const struct vp_src_register *src)
-{
- static const char comps[5] = "xyzw";
- if (src->Negate)
- _mesa_printf("-");
- if (src->RelAddr) {
- if (src->Index > 0)
- _mesa_printf("c[A0.x + %d]", src->Index);
- else if (src->Index < 0)
- _mesa_printf("c[A0.x - %d]", -src->Index);
- else
- _mesa_printf("c[A0.x]");
- }
- else if (src->File == PROGRAM_OUTPUT) {
- _mesa_printf("o[%s]", OutputRegisters[src->Index]);
- }
- else if (src->File == PROGRAM_INPUT) {
- _mesa_printf("v[%s]", InputRegisters[src->Index]);
- }
- else if (src->File == PROGRAM_ENV_PARAM) {
- _mesa_printf("c[%d]", src->Index);
- }
- else {
- ASSERT(src->File == PROGRAM_TEMPORARY);
- _mesa_printf("R%d", src->Index);
- }
-
- if (src->Swizzle[0] == src->Swizzle[1] &&
- src->Swizzle[0] == src->Swizzle[2] &&
- src->Swizzle[0] == src->Swizzle[3]) {
- _mesa_printf(".%c", comps[src->Swizzle[0]]);
- }
- else if (src->Swizzle[0] != 0 ||
- src->Swizzle[1] != 1 ||
- src->Swizzle[2] != 2 ||
- src->Swizzle[3] != 3) {
- _mesa_printf(".%c%c%c%c",
- comps[src->Swizzle[0]],
- comps[src->Swizzle[1]],
- comps[src->Swizzle[2]],
- comps[src->Swizzle[3]]);
- }
-}
-
-
-static void
-PrintDstReg(const struct vp_dst_register *dst)
-{
- GLint w = dst->WriteMask[0] + dst->WriteMask[1]
- + dst->WriteMask[2] + dst->WriteMask[3];
-
- if (dst->File == PROGRAM_OUTPUT) {
- _mesa_printf("o[%s]", OutputRegisters[dst->Index]);
- }
- else if (dst->File == PROGRAM_INPUT) {
- _mesa_printf("v[%s]", InputRegisters[dst->Index]);
- }
- else if (dst->File == PROGRAM_ENV_PARAM) {
- _mesa_printf("c[%d]", dst->Index);
- }
- else {
- ASSERT(dst->File == PROGRAM_TEMPORARY);
- _mesa_printf("R%d", dst->Index);
- }
-
- if (w != 0 && w != 4) {
- _mesa_printf(".");
- if (dst->WriteMask[0])
- _mesa_printf("x");
- if (dst->WriteMask[1])
- _mesa_printf("y");
- if (dst->WriteMask[2])
- _mesa_printf("z");
- if (dst->WriteMask[3])
- _mesa_printf("w");
- }
-}
-
-
-/**
- * Print a single NVIDIA vertex program instruction.
- */
-void
-_mesa_print_nv_vertex_instruction(const struct vp_instruction *inst)
-{
- switch (inst->Opcode) {
- case VP_OPCODE_MOV:
- case VP_OPCODE_LIT:
- case VP_OPCODE_RCP:
- case VP_OPCODE_RSQ:
- case VP_OPCODE_EXP:
- case VP_OPCODE_LOG:
- case VP_OPCODE_RCC:
- case VP_OPCODE_ABS:
- _mesa_printf("%s ", Opcodes[(int) inst->Opcode]);
- PrintDstReg(&inst->DstReg);
- _mesa_printf(", ");
- PrintSrcReg(&inst->SrcReg[0]);
- _mesa_printf(";\n");
- break;
- case VP_OPCODE_MUL:
- case VP_OPCODE_ADD:
- case VP_OPCODE_DP3:
- case VP_OPCODE_DP4:
- case VP_OPCODE_DST:
- case VP_OPCODE_MIN:
- case VP_OPCODE_MAX:
- case VP_OPCODE_SLT:
- case VP_OPCODE_SGE:
- case VP_OPCODE_DPH:
- case VP_OPCODE_SUB:
- _mesa_printf("%s ", Opcodes[(int) inst->Opcode]);
- PrintDstReg(&inst->DstReg);
- _mesa_printf(", ");
- PrintSrcReg(&inst->SrcReg[0]);
- _mesa_printf(", ");
- PrintSrcReg(&inst->SrcReg[1]);
- _mesa_printf(";\n");
- break;
- case VP_OPCODE_MAD:
- _mesa_printf("MAD ");
- PrintDstReg(&inst->DstReg);
- _mesa_printf(", ");
- PrintSrcReg(&inst->SrcReg[0]);
- _mesa_printf(", ");
- PrintSrcReg(&inst->SrcReg[1]);
- _mesa_printf(", ");
- PrintSrcReg(&inst->SrcReg[2]);
- _mesa_printf(";\n");
- break;
- case VP_OPCODE_ARL:
- _mesa_printf("ARL A0.x, ");
- PrintSrcReg(&inst->SrcReg[0]);
- _mesa_printf(";\n");
- break;
- case VP_OPCODE_END:
- _mesa_printf("END\n");
- break;
- default:
- _mesa_printf("BAD INSTRUCTION\n");
- }
-}
-
-
-/**
- * Print (unparse) the given vertex program. Just for debugging.
- */
-void
-_mesa_print_nv_vertex_program(const struct vertex_program *program)
-{
- const struct vp_instruction *inst;
-
- for (inst = program->Instructions; ; inst++) {
- _mesa_print_nv_vertex_instruction(inst);
- if (inst->Opcode == VP_OPCODE_END)
- return;
- }
-}
-
-