+
+ /* Destinations of instructions in a writeout block cannot be assigned
+ * to r1 unless they are actually used as r1 from the writeout itself,
+ * since the writes to r1 are special. A code sequence like:
+ *
+ * sadd.fmov r1.x, [...]
+ * vadd.fadd r0, r1, r2
+ * [writeout branch]
+ *
+ * will misbehave since the r1.x write will be interpreted as a
+ * gl_FragDepth write so it won't show up correctly when r1 is read in
+ * the following segment. We model this as interference.
+ */
+
+ l->solutions[node_r1] = (16 * 1);
+
+ mir_foreach_block(ctx, _blk) {
+ midgard_block *blk = (midgard_block *) _blk;
+
+ mir_foreach_bundle_in_block(blk, v) {
+ /* We need at least a writeout and nonwriteout instruction */
+ if (v->instruction_count < 2)
+ continue;
+
+ /* Branches always come at the end */
+ midgard_instruction *br = v->instructions[v->instruction_count - 1];
+
+ if (!br->writeout)
+ continue;
+
+ for (signed i = v->instruction_count - 2; i >= 0; --i) {
+ midgard_instruction *ins = v->instructions[i];
+
+ if (ins->dest >= ctx->temp_count)
+ continue;
+
+ bool used_as_r1 = (br->dest == ins->dest);
+
+ mir_foreach_src(br, s)
+ used_as_r1 |= (s > 0) && (br->src[s] == ins->dest);
+
+ if (!used_as_r1)
+ lcra_add_node_interference(l, ins->dest, mir_bytemask(ins), node_r1, 0xFFFF);
+ }
+ }
+ }
+
+ /* Precolour blend input to r0. Note writeout is necessarily at the end
+ * and blend shaders are single-RT only so there is only a single
+ * writeout block, so this cannot conflict with the writeout r0 (there
+ * is no need to have an intermediate move) */
+
+ if (ctx->blend_input != ~0) {
+ assert(ctx->blend_input < ctx->temp_count);
+ l->solutions[ctx->blend_input] = 0;
+ }
+
+ /* Same for the dual-source blend input/output, except here we use r2,
+ * which is also set in the fragment shader. */
+
+ if (ctx->blend_src1 != ~0) {
+ assert(ctx->blend_src1 < ctx->temp_count);
+ l->solutions[ctx->blend_src1] = (16 * 2);
+ ctx->work_registers = MAX2(ctx->work_registers, 2);
+ }
+