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Harmonize BRAM/LUTRAM descriptions across all of Yosys.
[yosys.git]
/
techlibs
/
ecp5
/
synth_ecp5.cc
diff --git
a/techlibs/ecp5/synth_ecp5.cc
b/techlibs/ecp5/synth_ecp5.cc
index 1f5b1cb6bd2c81367ecd7418fb1f9db9787862c1..3985da57af12b478816ad76e51ccae3fe12e6449 100644
(file)
--- a/
techlibs/ecp5/synth_ecp5.cc
+++ b/
techlibs/ecp5/synth_ecp5.cc
@@
-79,6
+79,9
@@
struct SynthEcp5Pass : public ScriptPass
log(" -nowidelut\n");
log(" do not use PFU muxes to implement LUTs larger than LUT4s\n");
log("\n");
log(" -nowidelut\n");
log(" do not use PFU muxes to implement LUTs larger than LUT4s\n");
log("\n");
+ log(" -asyncprld\n");
+ log(" use async PRLD mode to implement DLATCH and DFFSR (EXPERIMENTAL)\n");
+ log("\n");
log(" -abc2\n");
log(" run two passes of 'abc' for slightly improved logic density\n");
log("\n");
log(" -abc2\n");
log(" run two passes of 'abc' for slightly improved logic density\n");
log("\n");
@@
-99,7
+102,7
@@
struct SynthEcp5Pass : public ScriptPass
}
string top_opt, blif_file, edif_file, json_file;
}
string top_opt, blif_file, edif_file, json_file;
- bool noccu2, nodffe, nobram, nolutram, nowidelut, flatten, retime, abc2, abc9, nodsp, vpr;
+ bool noccu2, nodffe, nobram, nolutram, nowidelut,
asyncprld,
flatten, retime, abc2, abc9, nodsp, vpr;
void clear_flags() YS_OVERRIDE
{
void clear_flags() YS_OVERRIDE
{
@@
-112,6
+115,7
@@
struct SynthEcp5Pass : public ScriptPass
nobram = false;
nolutram = false;
nowidelut = false;
nobram = false;
nolutram = false;
nowidelut = false;
+ asyncprld = false;
flatten = true;
retime = false;
abc2 = false;
flatten = true;
retime = false;
abc2 = false;
@@
-176,6
+180,10
@@
struct SynthEcp5Pass : public ScriptPass
nobram = true;
continue;
}
nobram = true;
continue;
}
+ if (args[argidx] == "-asyncprld") {
+ asyncprld = true;
+ continue;
+ }
if (args[argidx] == "-nolutram" || /*deprecated alias*/ args[argidx] == "-nodram") {
nolutram = true;
continue;
if (args[argidx] == "-nolutram" || /*deprecated alias*/ args[argidx] == "-nodram") {
nolutram = true;
continue;
@@
-222,7
+230,7
@@
struct SynthEcp5Pass : public ScriptPass
{
if (check_label("begin"))
{
{
if (check_label("begin"))
{
- run("read_verilog -
D_ABC -
lib +/ecp5/cells_sim.v +/ecp5/cells_bb.v");
+ run("read_verilog -lib +/ecp5/cells_sim.v +/ecp5/cells_bb.v");
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
}
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
}
@@
-258,13
+266,13
@@
struct SynthEcp5Pass : public ScriptPass
if (!nobram && check_label("map_bram", "(skip if -nobram)"))
{
if (!nobram && check_label("map_bram", "(skip if -nobram)"))
{
- run("memory_bram -rules +/ecp5/bram.txt");
+ run("memory_bram -rules +/ecp5/bram
s
.txt");
run("techmap -map +/ecp5/brams_map.v");
}
if (!nolutram && check_label("map_lutram", "(skip if -nolutram)"))
{
run("techmap -map +/ecp5/brams_map.v");
}
if (!nolutram && check_label("map_lutram", "(skip if -nolutram)"))
{
- run("memory_bram -rules +/ecp5/lutram.txt");
+ run("memory_bram -rules +/ecp5/lutram
s
.txt");
run("techmap -map +/ecp5/lutrams_map.v");
}
run("techmap -map +/ecp5/lutrams_map.v");
}
@@
-292,11
+300,12
@@
struct SynthEcp5Pass : public ScriptPass
run("opt_clean");
if (!nodffe)
run("dff2dffe -direct-match $_DFF_* -direct-match $__DFFS_*");
run("opt_clean");
if (!nodffe)
run("dff2dffe -direct-match $_DFF_* -direct-match $__DFFS_*");
- run(
"techmap -D NO_LUT -map +/ecp5/cells_map.v"
);
+ run(
stringf("techmap -D NO_LUT %s -map +/ecp5/cells_map.v", help_mode ? "[-D ASYNC_PRLD]" : (asyncprld ? "-D ASYNC_PRLD" : ""))
);
run("opt_expr -undriven -mux_undef");
run("simplemap");
run("ecp5_ffinit");
run("ecp5_gsr");
run("opt_expr -undriven -mux_undef");
run("simplemap");
run("ecp5_ffinit");
run("ecp5_gsr");
+ run("attrmvcp -copy -attr syn_useioff");
run("opt_clean");
}
run("opt_clean");
}
@@
-305,17
+314,19
@@
struct SynthEcp5Pass : public ScriptPass
if (abc2 || help_mode) {
run("abc", " (only if -abc2)");
}
if (abc2 || help_mode) {
run("abc", " (only if -abc2)");
}
- std::string techmap_args = "-map +/ecp5/latches_map.v";
+ std::string techmap_args =
asyncprld ? "" :
"-map +/ecp5/latches_map.v";
if (abc9)
if (abc9)
- techmap_args += " -map +/ecp5/abc_map.v -max_iter 1";
- run("techmap " + techmap_args);
+ techmap_args += " -map +/ecp5/abc9_map.v -max_iter 1";
+ if (!asyncprld || abc9)
+ run("techmap " + techmap_args);
if (abc9) {
if (abc9) {
+ run("read_verilog -icells -lib +/ecp5/abc9_model.v");
if (nowidelut)
if (nowidelut)
- run("abc9 -lut +/ecp5/abc
_5g_nowide.lut -box +/ecp5/abc_5g.box -W 200
");
+ run("abc9 -lut +/ecp5/abc
9_5g_nowide.lut -box +/ecp5/abc9_5g.box -W 200 -nomfs
");
else
else
- run("abc9 -lut +/ecp5/abc
_5g.lut -box +/ecp5/abc_5g.box -W 200
");
- run("techmap -map +/ecp5/abc_unmap.v");
+ run("abc9 -lut +/ecp5/abc
9_5g.lut -box +/ecp5/abc9_5g.box -W 200 -nomfs
");
+ run("techmap -map +/ecp5/abc
9
_unmap.v");
} else {
if (nowidelut)
run("abc -lut 4 -dress");
} else {
if (nowidelut)
run("abc -lut 4 -dress");
@@
-337,6
+348,7
@@
struct SynthEcp5Pass : public ScriptPass
if (check_label("check"))
{
if (check_label("check"))
{
+ run("autoname");
run("hierarchy -check");
run("stat");
run("check -noinit");
run("hierarchy -check");
run("stat");
run("check -noinit");