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-system.cpu.dcache.LoadLockedReq_hits::total 280491 # number of LoadLockedReq hits
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-system.cpu.dcache.overall_hits::total 21094791 # number of overall hits
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-system.cpu.dcache.ReadReq_misses::total 731455 # number of ReadReq misses
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-system.cpu.dcache.LoadLockedReq_misses::total 13626 # number of LoadLockedReq misses
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-system.cpu.dcache.StoreCondReq_misses::total 12 # number of StoreCondReq misses
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-system.cpu.dcache.overall_misses::total 3692032 # number of overall misses
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-system.cpu.dcache.LoadLockedReq_miss_latency::total 181290500 # number of LoadLockedReq miss cycles
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-system.cpu.dcache.StoreCondReq_miss_latency::total 192000 # number of StoreCondReq miss cycles
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-system.cpu.dcache.overall_miss_latency::total 115082610226 # number of overall miss cycles
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-system.cpu.dcache.StoreCondReq_accesses::total 285740 # number of StoreCondReq accesses(hits+misses)
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-system.cpu.dcache.overall_accesses::total 24786823 # number of overall (read+write) accesses
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-system.cpu.dcache.LoadLockedReq_miss_rate::total 0.046329 # miss rate for LoadLockedReq accesses
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-system.cpu.dcache.ReadReq_avg_miss_latency::total 13079.075268 # average ReadReq miss latency
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-system.cpu.dcache.WriteReq_avg_miss_latency::total 35640.300937 # average WriteReq miss latency
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data 13304.748275 # average LoadLockedReq miss latency
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::total 13304.748275 # average LoadLockedReq miss latency
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-system.cpu.dcache.StoreCondReq_avg_miss_latency::total 16000 # average StoreCondReq miss latency
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-system.cpu.dcache.demand_avg_miss_latency::total 31170.534336 # average overall miss latency
-system.cpu.dcache.overall_avg_miss_latency::cpu.data 31170.534336 # average overall miss latency
-system.cpu.dcache.overall_avg_miss_latency::total 31170.534336 # average overall miss latency
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-system.cpu.dcache.writebacks::total 607749 # number of writebacks
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-system.cpu.dcache.ReadReq_mshr_uncacheable_latency::total 182357111500 # number of ReadReq MSHR uncacheable cycles
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