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-system.physmem.totQLat 393203348000 # Total cycles spent in queuing delays
-system.physmem.totMemAccLat 485594944250 # Sum of mem lat for all requests
-system.physmem.totBusLat 75482355000 # Total cycles spent in databus access
-system.physmem.totBankLat 16909241250 # Total cycles spent in bank access
-system.physmem.avgQLat 26046.04 # Average queueing delay per request
-system.physmem.avgBankLat 1120.08 # Average bank access latency per request
-system.physmem.avgBusLat 5000.00 # Average bus latency per request
-system.physmem.avgMemAccLat 32166.12 # Average memory access latency
-system.physmem.avgRdBW 381.43 # Average achieved read bandwidth in MB/s
-system.physmem.avgWrBW 20.54 # Average achieved write bandwidth in MB/s
-system.physmem.avgConsumedRdBW 51.10 # Average consumed read bandwidth in MB/s
-system.physmem.avgConsumedWrBW 2.68 # Average consumed write bandwidth in MB/s
-system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MB/s
-system.physmem.busUtil 3.14 # Data bus utilization in percentage
-system.physmem.avgRdQLen 0.19 # Average read queue length over time
-system.physmem.avgWrQLen 12.50 # Average write queue length over time
-system.physmem.readRowHits 15020252 # Number of row buffer hits during reads
-system.physmem.writeRowHits 793086 # Number of row buffer hits during writes
-system.physmem.readRowHitRate 99.50 # Row buffer hit rate for reads
-system.physmem.writeRowHitRate 97.53 # Row buffer hit rate for writes
-system.physmem.avgGap 159215.54 # Average gap between requests
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+system.physmem.bytesPerActivate::samples 949853 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::mean 1012.832967 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::gmean 998.129194 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::stdev 95.600820 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::0-127 4614 0.49% 0.49% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::128-255 3555 0.37% 0.86% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::256-383 1868 0.20% 1.06% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::384-511 1270 0.13% 1.19% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::512-639 998 0.11% 1.30% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::640-767 697 0.07% 1.37% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::768-895 628 0.07% 1.43% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::896-1023 802 0.08% 1.52% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::1024-1151 935421 98.48% 100.00% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::total 949853 # Bytes accessed per row activation
+system.physmem.rdPerTurnAround::samples 5541 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::mean 2709.372676 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::stdev 121858.968991 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::0-524287 5537 99.93% 99.93% # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::524288-1.04858e+06 2 0.04% 99.96% # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::2.09715e+06-2.62144e+06 1 0.02% 99.98% # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::8.38861e+06-8.9129e+06 1 0.02% 100.00% # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::total 5541 # Reads before turning the bus around for writes
+system.physmem.wrPerTurnAround::samples 5541 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::mean 19.245082 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::gmean 18.302826 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::stdev 7.619957 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::16 3691 66.61% 66.61% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::17 16 0.29% 66.90% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::18 178 3.21% 70.11% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::19 1008 18.19% 88.31% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::20 44 0.79% 89.10% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::21 25 0.45% 89.55% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::22 20 0.36% 89.91% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::23 16 0.29% 90.20% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::24 5 0.09% 90.29% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::25 2 0.04% 90.33% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::26 1 0.02% 90.34% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::32 1 0.02% 90.36% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::34 1 0.02% 90.38% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::39 2 0.04% 90.42% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::40 1 0.02% 90.43% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::41 143 2.58% 93.02% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::42 305 5.50% 98.52% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::43 21 0.38% 98.90% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::44 14 0.25% 99.15% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::45 20 0.36% 99.51% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::46 15 0.27% 99.78% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::47 5 0.09% 99.87% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::48 3 0.05% 99.93% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::49 1 0.02% 99.95% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::50 3 0.05% 100.00% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::total 5541 # Writes before turning the bus around for reads
+system.physmem.totQLat 571195583500 # Total ticks spent queuing
+system.physmem.totMemAccLat 674382869750 # Total ticks spent from burst creation until serviced by the DRAM
+system.physmem.totBusLat 75063215000 # Total ticks spent in databus transfers
+system.physmem.totBankLat 28124071250 # Total ticks spent accessing banks
+system.physmem.avgQLat 38047.64 # Average queueing delay per DRAM burst
+system.physmem.avgBankLat 1873.36 # Average bank access latency per DRAM burst
+system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst
+system.physmem.avgMemAccLat 44921.00 # Average memory access latency per DRAM burst
+system.physmem.avgRdBW 380.34 # Average DRAM read bandwidth in MiByte/s
+system.physmem.avgWrBW 2.70 # Average achieved write bandwidth in MiByte/s
+system.physmem.avgRdBWSys 51.24 # Average system read bandwidth in MiByte/s
+system.physmem.avgWrBWSys 2.69 # Average system write bandwidth in MiByte/s
+system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
+system.physmem.busUtil 2.99 # Data bus utilization in percentage
+system.physmem.busUtilRead 2.97 # Data bus utilization in percentage for reads
+system.physmem.busUtilWrite 0.02 # Data bus utilization in percentage for writes
+system.physmem.avgRdQLen 7.11 # Average read queue length when enqueuing
+system.physmem.avgWrQLen 26.53 # Average write queue length when enqueuing
+system.physmem.readRowHits 14041195 # Number of row buffer hits during reads
+system.physmem.writeRowHits 91389 # Number of row buffer hits during writes
+system.physmem.readRowHitRate 93.53 # Row buffer hit rate for reads
+system.physmem.writeRowHitRate 85.68 # Row buffer hit rate for writes
+system.physmem.avgGap 158778.41 # Average gap between requests
+system.physmem.pageHitRate 93.47 # Row buffer hit rate, read and write combined
+system.physmem.prechargeAllPercent 4.34 # Percentage of time for which DRAM has all the banks in precharge state
+system.realview.nvmem.bytes_read::cpu.inst 64 # Number of bytes read from this memory
+system.realview.nvmem.bytes_read::total 64 # Number of bytes read from this memory
+system.realview.nvmem.bytes_inst_read::cpu.inst 64 # Number of instructions bytes read from this memory
+system.realview.nvmem.bytes_inst_read::total 64 # Number of instructions bytes read from this memory
+system.realview.nvmem.num_reads::cpu.inst 1 # Number of read requests responded to by this memory
+system.realview.nvmem.num_reads::total 1 # Number of read requests responded to by this memory
+system.realview.nvmem.bw_read::cpu.inst 25 # Total read bandwidth from this memory (bytes/s)
+system.realview.nvmem.bw_read::total 25 # Total read bandwidth from this memory (bytes/s)
+system.realview.nvmem.bw_inst_read::cpu.inst 25 # Instruction read bandwidth from this memory (bytes/s)
+system.realview.nvmem.bw_inst_read::total 25 # Instruction read bandwidth from this memory (bytes/s)
+system.realview.nvmem.bw_total::cpu.inst 25 # Total bandwidth to/from this memory (bytes/s)
+system.realview.nvmem.bw_total::total 25 # Total bandwidth to/from this memory (bytes/s)
+system.membus.throughput 54878638 # Throughput (bytes/s)
+system.membus.trans_dist::ReadReq 16149508 # Transaction distribution
+system.membus.trans_dist::ReadResp 16149508 # Transaction distribution
+system.membus.trans_dist::WriteReq 763349 # Transaction distribution
+system.membus.trans_dist::WriteResp 763349 # Transaction distribution
+system.membus.trans_dist::Writeback 59141 # Transaction distribution
+system.membus.trans_dist::UpgradeReq 4671 # Transaction distribution
+system.membus.trans_dist::SCUpgradeReq 3 # Transaction distribution
+system.membus.trans_dist::UpgradeResp 4674 # Transaction distribution
+system.membus.trans_dist::ReadExReq 131433 # Transaction distribution
+system.membus.trans_dist::ReadExResp 131433 # Transaction distribution
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 2383044 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.nvmem.port 2 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.gic.pio 3760 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.a9scu.pio 2 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1885845 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::total 4272653 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 29884416 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.iocache.mem_side::total 29884416 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 34157069 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 2390454 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.nvmem.port 64 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.gic.pio 7520 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.a9scu.pio 4 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 16697056 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 19095098 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.iocache.mem_side::system.physmem.port 119537664 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.iocache.mem_side::total 119537664 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 138632762 # Cumulative packet size per connected master and slave (bytes)
+system.membus.data_through_bus 138632762 # Total data (bytes)
+system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
+system.membus.reqLayer0.occupancy 1487078000 # Layer occupancy (ticks)
+system.membus.reqLayer0.utilization 0.1 # Layer utilization (%)
+system.membus.reqLayer1.occupancy 1000 # Layer occupancy (ticks)
+system.membus.reqLayer1.utilization 0.0 # Layer utilization (%)
+system.membus.reqLayer2.occupancy 3653000 # Layer occupancy (ticks)
+system.membus.reqLayer2.utilization 0.0 # Layer utilization (%)
+system.membus.reqLayer4.occupancy 1500 # Layer occupancy (ticks)
+system.membus.reqLayer4.utilization 0.0 # Layer utilization (%)
+system.membus.reqLayer6.occupancy 17362845500 # Layer occupancy (ticks)
+system.membus.reqLayer6.utilization 0.7 # Layer utilization (%)
+system.membus.respLayer1.occupancy 4737809043 # Layer occupancy (ticks)
+system.membus.respLayer1.utilization 0.2 # Layer utilization (%)
+system.membus.respLayer2.occupancy 37210156152 # Layer occupancy (ticks)
+system.membus.respLayer2.utilization 1.5 # Layer utilization (%)