* [[180nm_Oct2020/interfaces]] we need as a bare minimum include JTAG,
GPIO, EINT, SPI and QSPI, I2C, UART16550, LPC (from Raptor Engineering)
and that actually might even be it.
+* [[180nm_Oct2020/ls180]] actual auto-generated pinouts by pinmux program
## Secondary priorities
* [[programmerjake]] TODO
* [[Yehowshua_Immanuel]] - Delegate interfaces and do timeline/cost projections
* [[mnolan]] pipelines
-* [[tplaten]] TODO
+* [[tplaten]] memory and cache
* [[jock_tanner]] TODO
* MarketNext TODO
-# Preliminary coriolis2 ASIC layout, 02jul2020
+# Preliminary coriolis2 ASIC layout
+
+## 02jul2020 - first version
+
+* <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-July/008438.html>
[[!img 180nm_Oct2020/2020-07-02_19-01.png size="900x" ]]
+
+## 03jul2020 - DIV unit added
+
+[[!img 180nm_Oct2020/2020-07-03_11-04.png size="900x" ]]
+