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[libreriscv.git] / 22nm_PowerPI.mdwn

diff --git a/22nm_PowerPI.mdwn b/22nm_PowerPI.mdwn
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--- a/22nm_PowerPI.mdwn
+++ b/22nm_PowerPI.mdwn
@@ -2,7 +2,7 @@
 
 This is a page describing a proposed mass-volume SoC.  It outlines:
 
-* the NREs involved (realistically USD $7m, with headroom up to $12m preferred)
+* the Non-Recurring Engineering (NRE) costs involved (realistically USD $7m, with headroom up to $12m preferred)
 * proposes a fair market price (around $12-13)
 * estimates a manufacturing cost (around $3.50 to $4)
 * realistic industry-standard timescales (12-18 months).
@@ -107,7 +107,7 @@ These are ballpark estimates:
 * USD 400,000 for engineer to perform layout to GDS-II
 * USD 1,000,000 for (LP)DDR3/4 which includes customisation by IP vendor
 * USD 250,000 for Libre-licensed DDR firmware (normally closed binary)
-* USD 250,000 for USB3/C
+* USD 250,000 for USB3.1/2/C
 * USD 250,000 for HDMI PHY (includes HDCP closed firmware: DVI may be better)
 * USD 50,000 for PCIe PHY
 * USD 50,000 for RGMII Ethernet PHY
@@ -150,7 +150,7 @@ NREs are still required**
  - Standard "Pi / Arduino" SoC-style interfaces including UART, I2C,
    SPI, GPIO, PWM, EINT, AC97.
 
-The "PI / Arduino" style interfaces are provided so as to be pin-comoatibke with the existing "Shield" 3rd party producy markets.
+The "PI / Arduino" style interfaces are provided so as to be pin-compatible with the existing "Shield" 3rd party producy markets.
 
 # Interfaces