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[libreriscv.git] / 3d_gpu / architecture.mdwn

diff --git a/3d_gpu/architecture.mdwn b/3d_gpu/architecture.mdwn
index ca20268e1adde51ab373741ffd8fb22763980674..a201b8677e5aa448928234b158f14785a21620bb 100644 (file)
--- a/3d_gpu/architecture.mdwn
+++ b/3d_gpu/architecture.mdwn
@@ -39,3 +39,7 @@ Section TODO, with own page [[architecture/memory_and_cache]]  LD/ST accesses ar
 # Bus arrangement
 
 Wishbone was chosen.  to expand why (related to patents).
+
+# IOMMU
+
+Section TODO, an IOMMU is an integral part of protecting processes from directly accessing peripherals (and other memory areas) that they shouldn't.