Our primary goal is to design a **complete** all-in-one processor
(System-on-a-Chip) that happens to include a libre-licensed VPU and GPU.
-We seek investors, sponsors, engineers and potential customers, who are
+We seek investors, sponsors (whose contributions thanks to NLNet may be tax-deductible), engineers and potential customers, who are
interested, as a first product, in the creation and use of an entirely
libre low-power mobile class system-on-a-chip. Comparative benchmark
performance, pincount and price is the Allwinner A64, except that the
Recent applications to NLNet (Oct 2019) are for a test chip in 180nm, 64 bit, single core dual issue, around 300 to 350mhz. This will provide the confidence to go to higher geometries, as well as be a commercially viable embedded product in its own right.
-See:
+# Business Objectives
+
+* the project shall be a hybrid CPU-GPU
+* the project shall be commercial and mass-volume (100 million units
+ and above)
+* the project shall be entirely transparent so that end-users will be
+ able to trust it
+* the source code shall be available at all times for all components
+ for BUSINESS reasons, making development and use of SDKs dead simple
+ and aiding and assisting developers AND BUSINESSES in debugging and thus
+ hugely saving them money.
+
+Reasoning:
+
+* If the processor is not a hybrid CPU-GPU-VPU, the
+ complexity involved in developing a split shared-memory CPU-GPU both
+ at a hardware and a software level will be so costly it will jeapordise
+ the project.
+* The project is commercial and mass-volume because there are plenty
+ of academic designs (none of them reaching production where people
+ may benefit), and "Open" designs, created by the Open Hardware
+ Community, sadly due to the high cost of producing ASICs, tend to be
+ focussed on markets that would have been great about twenty to thirty
+ years ago.
+* Transparency is a key business objective. It is a Unique Selling Point
+ that the processor is developed in a fashion that, should it be
+ independently audited, no opportunity for spying back-door co-processors
+ will be found to have "made their way surreptitiously - or overtly -
+ into the design". Yes, GCHQ: I know about the conversation you had
+ with nCipher (and, to their everlasting credit, that they told you
+ to take a hike)
+
+# Links:
* [[shakti/m_class/libre_3d_gpu]]
* [[discussion]]
* [[resources]]
+* [[overview]]
+* [[3d_gpu/funding]]
+* [[3d_gpu/architecture]]
* Founding [[charter]]
* Mailing list <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/>
* Crowdsupply page <https://www.crowdsupply.com/libre-risc-v/m-class>
* NLNet Project Page <https://nlnet.nl/project/Libre-RISCV/>
* [[nlnet_proposals]]
-Progress:
+# Progress:
-* Dec 2019: Second round NLNet questions answered.
+* Dec 2019: Second round NLNet questions answered. External Review completed. 6 NLNet proposals accepted (EUR 200,000+)
* Nov 2019: Alternative FP library to Berkeley softfloat developed. NLNet first round questions answered.
* Oct 2019: 3D Standards continued. POWER ISA considered. Open 3D Alliance begins. NLNet funding applications submitted.
* Sep 2019: 3D Standards continued. Additional NLNet Funding proposals discussed.
* <https://www.reddit.com/r/RISCV/comments/db04j3/libreriscv_3d_cpugpu_seeks_grants_for_ambitious/>
* <https://hardware.slashdot.org/story/19/09/29/1845252/libre-risc-v-3d-cpugpu-seeks-grants-for-ambitious-expansion>
* <https://forums.puri.sm/t/risc-v-m-class-effort-and-purism-donation/6528/15>
+* <https://www.pro-linux.de/news/1/27527/comm/1/show-all-comments.html>
# Information Resources and Tutorials
projects / libreriscv.git / blobdiff