* ISA parsing
* SWIG intergration
* New memory system
+* New Caches
* Simple CPU
* Instruction tracing
* PC sampling
* I/O <-> memory interface
* PCI device interface
* Multiple ISA support
+* Ethernet (Intel NIC) device model
* Memory bridge, bus, packet, port interfaces
Kevin T. Lim
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* Multiple ISA support
* SPARC ISA support
+* X86 ISA support
* Alpha support reorganization
* SPARC SE support
+* X86 SE support
+* Remote GDB in SE support
+* TLB based translation in SE
+* Statetrace debugging tool
+* Microcode system
Korey L. Sewell
-----------------------