Update example for GW1NR-9

[yosys.git] / CHANGELOG

diff --git a/CHANGELOG b/CHANGELOG
index f7774cb9e281eb7654db8e8ee47df2786b45e3ee..c2942929561c7700cb92ab5c52bdc6ada51ea625 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -36,6 +36,8 @@ Yosys 0.9 .. Yosys 0.9-dev
     - Added "ice40_wrapcarry" to encapsulate SB_LUT+SB_CARRY pairs for techmapping
     - Removed "ice40_unlut"
     - Improvements in pmgen: slices, choices, define, generate
+    - Added "xilinx_srl" for Xilinx shift register extraction
+    - Removed "shregmap -tech xilinx" (superseded by "xilinx_srl")
 
 Yosys 0.8 .. Yosys 0.9
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