microwatt.mdwn: Added/fixed links to/from the new page.

[libreriscv.git] / HDL_workflow / microwatt.mdwn

diff --git a/HDL_workflow/microwatt.mdwn b/HDL_workflow/microwatt.mdwn
index 997d29aae0a7eaa034e437058b296de8ca596521..0d36c0ce03e768babbb3181f4addfed1f38a7009 100644 (file)
--- a/HDL_workflow/microwatt.mdwn
+++ b/HDL_workflow/microwatt.mdwn
@@ -7,6 +7,7 @@ useful links:
 * <https://codeconstruct.com.au/docs/microwatt-orangecrab/>
 * <https://shenki.github.io/boot-linux-on-microwatt/>
 * <https://github.com/gregdavill/OrangeCrab-test-sw>
+* New tutorial for Microwatt page (IN-PROGRESS): [[microwatt_tutorial]]
 
 prerequisite tools:
 
@@ -18,7 +19,7 @@ After installing ghdl-yosys-plugin use schroot to switch environment
 
     schroot -c bullseye_ghdl
     git clone https://git.libre-soc.org/git/microwatt.git
-    git checkout -b verilator_trace
+    git checkout verilator_trace
     export FPGA_TARGET=verilator
     make microwatt-verilator
 
@@ -105,6 +106,9 @@ notes for how to compile for ulx3s
 
 # Notes for nextpnr-xilinx
 
+superceded: see page [[nextpnr-xilinx]] and devscript 
+<https://git.libre-soc.org/?p=dev-env-setup.git;a=blob;f=nextpnr-xilinx-install;hb=HEAD>
+
 for compiling nextpnr-xilinx and making it useable for nmigen
 to compile for the digilent arty-a7-100t, requires a little
 futzing around, using the symbiflow version of prjxray-db
@@ -140,4 +144,27 @@ separate USB-serial adapter. see the following for further details:
 * <https://github.com/antonblanchard/microwatt/pull/347#issuecomment-1058800570>
 * <https://github.com/antonblanchard/microwatt/pull/347#issuecomment-1058834790>
 
+# running orangecrab-examples before flashing microwatt
+
+See <https://github.com/orangecrab-fpga/orangecrab-hardware/blob/main/contrib/10-orangecrab.rules>
+
+If the OrangeCrab is running in DFU mode, lsusb will show:
+
+    1209:5af0 Generic OrangeCrab r0.2 DFU Bootloader v3.1-6-g62e92e2
+    
+OrangeCrab has two DFU devices:
+
+    Found DFU: [1209:5af0] ver=0101, devnum=22, cfg=1, intf=0, path="1-4.2", alt=1, name="0x00100000 RISC-V Firmware", serial="UNKNOWN"
+    Found DFU: [1209:5af0] ver=0101, devnum=22, cfg=1, intf=0, path="1-4.2", alt=0, name="0x00080000 Bitstream", serial="UNKNOWN"
+    
+Then clone and patch orangecrab-examples:
+
+       git clone https://github.com/orangecrab-fpga/orangecrab-examples
+       patch -p1 < orangecrab-examples.diff
+       
+To build and flash the example:
 
+       pushd orangecrab-examples/nmigen
+       python3 blink.py
+       popd
+       sudo dfu-util -D orangecrab-examples/nmigen/build/top.bit -a 0