Added links

[libreriscv.git] / HDL_workflow / microwatt.mdwn

diff --git a/HDL_workflow/microwatt.mdwn b/HDL_workflow/microwatt.mdwn
index 0d3f1da7f6c515b315bd7eaf82f7e68536c6717b..821177c2fb863d4d9a132c0e8f7d0d137880e630 100644 (file)
--- a/HDL_workflow/microwatt.mdwn
+++ b/HDL_workflow/microwatt.mdwn
@@ -43,7 +43,7 @@ you can omit CROSS_COMPILE and ARCH in this case
        cd microwatt
        wget https://ftp.libre-soc.org/microwatt-linux-5.7.patch
        patch -p1 < microwatt-linux-5.7.patch
-       wget http://ftp.libre-soc.org/rootfs.cpio
+       wget https://ftp.libre-soc.org/rootfs.cpio
        CROSS_COMPILE="ccache powerpc64le-linux-gnu-" ARCH=powerpc make -j8 O=microwatt microwatt_defconfig
        CROSS_COMPILE="ccache powerpc64le-linux-gnu-" ARCH=powerpc make -j8 O=microwatt
        
@@ -58,6 +58,7 @@ This needs gcc-powerpc64le-linux-gnu if cross compilation is used.
        make 
        
 ## Building microwatt-verilator using the libre-soc core
+
        cd /path/to/soc
        make microwatt_external_core
        cp external_core_top.v /path/to/microwatt
@@ -67,8 +68,22 @@ This needs gcc-powerpc64le-linux-gnu if cross compilation is used.
        make microwatt-verilator
 
 ## Running the simulation
+
        cp microwatt/arch/powerpc/boot/dtbImage.microwatt
        ./microwatt-verilator sdram_init.bin dtbImage.microwatt
+       
+## Building the bitstring for OrangeCrab
+
+       cd microwatt
+       export FPGA_TARGET=ORANGE-CRAB
+       export GHDLSYNTH=ghdl
+       make microwatt.bit
+  
+## flashing the bitstring to the OrangeCrab
+
+       make prog # this will run OpenOCD
+
+
 
 ## TODO: buildroot
 
@@ -90,6 +105,9 @@ notes for how to compile for ulx3s
 
 # Notes for nextpnr-xilinx
 
+superceded: see page [[nextpnr-xilinx]] and devscript 
+<https://git.libre-soc.org/?p=dev-env-setup.git;a=blob;f=nextpnr-xilinx-install;hb=HEAD>
+
 for compiling nextpnr-xilinx and making it useable for nmigen
 to compile for the digilent arty-a7-100t, requires a little
 futzing around, using the symbiflow version of prjxray-db
@@ -116,3 +134,36 @@ instead of the one recommended as a submodule
     mkdir -p /usr/share/nextpnr/xilinx-chipdb
     cp xilinx/*.bin /usr/share/nextpnr/xilinx-chipdb
     cp -aux xilinx/external/prjxray-db /usr/share/nextpnr
+
+# Additional Useful Info for UART <-> USB Serial Interface Through OrangeCrab's Built-in USB Interface
+
+This uses OrangeCrab's built-in USB interface, rather than needing a
+separate USB-serial adapter. see the following for further details:
+
+* <https://github.com/antonblanchard/microwatt/pull/347#issuecomment-1058800570>
+* <https://github.com/antonblanchard/microwatt/pull/347#issuecomment-1058834790>
+
+# running orangecrab-examples before flashing microwatt
+
+See <https://github.com/orangecrab-fpga/orangecrab-hardware/blob/main/contrib/10-orangecrab.rules>
+
+If the OrangeCrab is running in DFU mode, lsusb will show:
+
+    1209:5af0 Generic OrangeCrab r0.2 DFU Bootloader v3.1-6-g62e92e2
+    
+OrangeCrab has two DFU devices:
+
+    Found DFU: [1209:5af0] ver=0101, devnum=22, cfg=1, intf=0, path="1-4.2", alt=1, name="0x00100000 RISC-V Firmware", serial="UNKNOWN"
+    Found DFU: [1209:5af0] ver=0101, devnum=22, cfg=1, intf=0, path="1-4.2", alt=0, name="0x00080000 Bitstream", serial="UNKNOWN"
+    
+Then clone and patch orangecrab-examples:
+
+       git clone https://github.com/orangecrab-fpga/orangecrab-examples
+       patch -p1 < orangecrab-examples.diff
+       
+To build and flash the example:
+
+       pushd orangecrab-examples/nmigen
+       python3 blink.py
+       popd
+       sudo dfu-util -D orangecrab-examples/nmigen/build/top.bit -a 0