add removestar link to HDL_workflow

[libreriscv.git] / HDL_workflow.mdwn

diff --git a/HDL_workflow.mdwn b/HDL_workflow.mdwn
index 3118e4e1eb14c2ed14f2d42baaf49950698a625e..f4f45ec89cb4c3f77dcb563d397d557f796d4ef3 100644 (file)
--- a/HDL_workflow.mdwn
+++ b/HDL_workflow.mdwn
@@ -294,7 +294,7 @@ root prompt, and save yourself some typing.
 * sudo bash
 * apt-get install vim exuberant-ctags
 * apt-get install build-essential
-* apt-get install git python3.7 python3.7-dev python-nosetest3
+* apt-get install git python3.7 python3.7-dev python3-nose
 * apt-get install graphviz xdot gtkwave
 * apt-get install python3-venv
 * apt-get install python-virtualenv  # this is an alternative to python3-venv
@@ -344,7 +344,7 @@ They should not however be considered "routine".
 
 Follow the source code (git clone) instructions here, do **not** use
 the "stable" version (do not download the tarball):
-<http://www.clifford.at/yosys/download.html>
+<https://github.com/YosysHQ/yosys>
 
 Or, alternatively, use the
 [hdl-tools-yosys](https://git.libre-soc.org/?p=dev-env-setup.git;a=blob;f=hdl-tools-yosys;hb=HEAD)
@@ -353,7 +353,7 @@ script (which also installs symbiyosys and its dependencies)
 Do not try to use a fixed revision of yosys (currently 0.9), nmigen is
 evolving and frequently interacts with yosys.
 
-[Yosys](http://www.clifford.at/yosys/) is a framework for Verilog RTL.
+[Yosys](https://github.com/YosysHQ/yosys is a framework for Verilog RTL.
 [Verilog](https://en.wikipedia.org/wiki/Verilog) is a hardware description
 language.
 RTL [Register Transfer
@@ -439,7 +439,7 @@ In the meantime, sfpy can be built as follows:
 You can test your installation by doing the following:
 
     python3
-    >>> from sfpy import *
+    >>> from sfpy import Posit8
     >>> Posit8(1.3)
 
 It should print out `Posit8(1.3125)`
@@ -543,7 +543,9 @@ See [[HDL_workflow/coriolis2]] page, for those people doing layout work.
 
 A portable FPGA place and route tool.
 
-See [[HDL_workflow/nextpnr]] page for installation instructions of nextpnr with ECP5 support for Lattice FPGA ECP5 series.
+See [[HDL_workflow/nextpnr]] page for installation instructions of nextpnr with ECP5 support for Lattice FPGA ECP5 series.  Also see
+[[HDL_workflow/ECP5_FPGA]] for connecting up to JTAG with a ULX3S
+and the Lattice VERSA_ECP5.
 
 ## Verilator
 
@@ -579,10 +581,12 @@ See [[HDL_workflow/cocotb]] page for installation instructions.
 
 ## Symbiflow
 
-needed for the Arty A7 100t Digilent FPGA board
+A fully open source toolchain for the development of FPGAs. Currently it targets Xilinx 7-series, Lattice iCE40 and ECP5, Quicklogic EOS S3.
+
+Needed for the Arty A7 100t Digilent FPGA board.
 
 See [[HDL_workflow/symbiflow]] for installation instructions
-and dependencies
+and dependencies.
 
 # Registering for git repository access<a name="gitolite3_access"></a>
 
@@ -655,6 +659,10 @@ Before running the following, install the
 dependencies.  This is easiest done with this script
 <https://git.libre-soc.org/?p=dev-env-setup.git;a=blob;f=install-hdl-apt-reqs;hb=HEAD>
 
+**It is critically important to install these in STRICT order, otherwise
+pip3 interferes and performs unauthorised downloads without informing
+you of what it is doing**.
+
 * mkdir ~/src
 * cd !$
 * git clone gitolite3@git.libre-soc.org:nmigen.git
@@ -665,7 +673,7 @@ dependencies.  This is easiest done with this script
 * git clone gitolite3@git.libre-soc.org:nmigen-soc.git
 * git clone gitolite3@git.libre-soc.org:soc.git
 
-In each of these directories, in the order listed, track down the
+In each of these directories, **in the order listed***, track down the
 `setup.py` file, then, as root (`sudo bash`), run the following:
 
 * python3 setup.py develop
@@ -676,7 +684,9 @@ for multi-user machine use however it is often just easier to get your
 own machine these days.
 
 The reason for the order is because soc depends on ieee754fpu, and
-ieee754fpu depends on nmutil
+ieee754fpu depends on nmutil.  If you do not follow the listed order
+pip3 will go off and download an arbitrary version without your
+consent.
 
 If "`python3 setup.py install`" is used it is a pain: edit, then
 install. edit, then install. It gets extremely tedious, hence why
@@ -917,6 +927,8 @@ the double import of the class from two separate locations, immediately.
 
 Really.  don't.  use.  wildcards.
 
+More about this here <https://www.asmeurer.com/removestar/>
+
 ### Keep file and variables short but clear
 
 * try to keep both filenames and variable names short but not ridiculously